Search

Kevin V. Quinto

Examiner (ID: 8233, Phone: (571)272-1920 , Office: P/2817 )

Most Active Art Unit
2826
Art Unit(s)
2826, 2817, 2821, 2829, 2893
Total Applications
1390
Issued Applications
1170
Pending Applications
65
Abandoned Applications
180

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5228143 [patent_doc_number] => 20070290250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'MULTIPLE DIELECTRIC FINFET STRUCTURE AND METHOD' [patent_app_type] => utility [patent_app_number] => 11/845972 [patent_app_country] => US [patent_app_date] => 2007-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2196 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20070290250.pdf [firstpage_image] =>[orig_patent_app_number] => 11845972 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/845972
MULTIPLE DIELECTRIC FINFET STRUCTURE AND METHOD Aug 27, 2007 Abandoned
Array ( [id] => 5082921 [patent_doc_number] => 20070272972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/833564 [patent_app_country] => US [patent_app_date] => 2007-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10521 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20070272972.pdf [firstpage_image] =>[orig_patent_app_number] => 11833564 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/833564
Semiconductor memory device and manufacturing method thereof Aug 2, 2007 Issued
Array ( [id] => 5043696 [patent_doc_number] => 20070262367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'IMAGE PICKUP DEVICE AND CAMERA' [patent_app_type] => utility [patent_app_number] => 11/782295 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3444 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20070262367.pdf [firstpage_image] =>[orig_patent_app_number] => 11782295 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/782295
Image pickup device and camera for converting charges into voltage Jul 23, 2007 Issued
Array ( [id] => 256712 [patent_doc_number] => 07576389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-18 [patent_title] => 'Semiconductor device and manufacture method thereof' [patent_app_type] => utility [patent_app_number] => 11/808163 [patent_app_country] => US [patent_app_date] => 2007-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 52 [patent_no_of_words] => 8498 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/576/07576389.pdf [firstpage_image] =>[orig_patent_app_number] => 11808163 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/808163
Semiconductor device and manufacture method thereof Jun 6, 2007 Issued
Array ( [id] => 5163018 [patent_doc_number] => 20070284599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Process for producing group III nitride semiconductor stacked structure' [patent_app_type] => utility [patent_app_number] => 11/808023 [patent_app_country] => US [patent_app_date] => 2007-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 10898 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20070284599.pdf [firstpage_image] =>[orig_patent_app_number] => 11808023 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/808023
Process for producing group III nitride semiconductor stacked structure Jun 5, 2007 Abandoned
Array ( [id] => 8329103 [patent_doc_number] => 08237201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Layout methods of integrated circuits having unit MOS devices' [patent_app_type] => utility [patent_app_number] => 11/807654 [patent_app_country] => US [patent_app_date] => 2007-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3590 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11807654 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/807654
Layout methods of integrated circuits having unit MOS devices May 29, 2007 Issued
Array ( [id] => 5008058 [patent_doc_number] => 20070278535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'Solid-state imaging device and imaging apparatus' [patent_app_type] => utility [patent_app_number] => 11/802884 [patent_app_country] => US [patent_app_date] => 2007-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2977 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20070278535.pdf [firstpage_image] =>[orig_patent_app_number] => 11802884 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/802884
Solid-state imaging device and imaging apparatus May 24, 2007 Issued
Array ( [id] => 113860 [patent_doc_number] => 07714409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/802644 [patent_app_country] => US [patent_app_date] => 2007-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/714/07714409.pdf [firstpage_image] =>[orig_patent_app_number] => 11802644 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/802644
Semiconductor device May 23, 2007 Issued
Array ( [id] => 4451609 [patent_doc_number] => 07964934 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-06-21 [patent_title] => 'Fuse target and method of forming the fuse target in a copper process flow' [patent_app_type] => utility [patent_app_number] => 11/805054 [patent_app_country] => US [patent_app_date] => 2007-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 4059 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/964/07964934.pdf [firstpage_image] =>[orig_patent_app_number] => 11805054 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/805054
Fuse target and method of forming the fuse target in a copper process flow May 21, 2007 Issued
Array ( [id] => 5163096 [patent_doc_number] => 20070284677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Metal oxynitride gate' [patent_app_type] => utility [patent_app_number] => 11/796164 [patent_app_country] => US [patent_app_date] => 2007-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2885 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20070284677.pdf [firstpage_image] =>[orig_patent_app_number] => 11796164 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/796164
Metal oxynitride gate Apr 25, 2007 Abandoned
Array ( [id] => 4698364 [patent_doc_number] => 20080220548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'MULTI-CHIP SURFACE MOUNTED LED STRUCTURE AND A METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/683624 [patent_app_country] => US [patent_app_date] => 2007-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2783 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20080220548.pdf [firstpage_image] =>[orig_patent_app_number] => 11683624 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/683624
MULTI-CHIP SURFACE MOUNTED LED STRUCTURE AND A METHOD FOR MANUFACTURING THE SAME Mar 7, 2007 Abandoned
Array ( [id] => 4698395 [patent_doc_number] => 20080220579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'STRESS ENHANCED MOS TRANSISTOR AND METHODS FOR ITS FABRICATION' [patent_app_type] => utility [patent_app_number] => 11/683174 [patent_app_country] => US [patent_app_date] => 2007-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4069 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20080220579.pdf [firstpage_image] =>[orig_patent_app_number] => 11683174 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/683174
STRESS ENHANCED MOS TRANSISTOR AND METHODS FOR ITS FABRICATION Mar 6, 2007 Abandoned
Array ( [id] => 5256736 [patent_doc_number] => 20070210368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'GATE STRUCTURE AND METHOD OF FORMING THE GATE STRUCTURE, SEMICONDUCTOR DEVICE HAVING THE GATE STRUCTURE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/683364 [patent_app_country] => US [patent_app_date] => 2007-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8021 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20070210368.pdf [firstpage_image] =>[orig_patent_app_number] => 11683364 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/683364
GATE STRUCTURE AND METHOD OF FORMING THE GATE STRUCTURE, SEMICONDUCTOR DEVICE HAVING THE GATE STRUCTURE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE Mar 6, 2007 Abandoned
Array ( [id] => 4974714 [patent_doc_number] => 20070215944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/682473 [patent_app_country] => US [patent_app_date] => 2007-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 74 [patent_figures_cnt] => 74 [patent_no_of_words] => 18017 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20070215944.pdf [firstpage_image] =>[orig_patent_app_number] => 11682473 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/682473
SEMICONDUCTOR DEVICE Mar 5, 2007 Abandoned
Array ( [id] => 4464122 [patent_doc_number] => 07935588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Enhanced transistor performance by non-conformal stressed layers' [patent_app_type] => utility [patent_app_number] => 11/682554 [patent_app_country] => US [patent_app_date] => 2007-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6256 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/935/07935588.pdf [firstpage_image] =>[orig_patent_app_number] => 11682554 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/682554
Enhanced transistor performance by non-conformal stressed layers Mar 5, 2007 Issued
Array ( [id] => 4974652 [patent_doc_number] => 20070215882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Light Emitting Device and Method of Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 11/681514 [patent_app_country] => US [patent_app_date] => 2007-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3569 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20070215882.pdf [firstpage_image] =>[orig_patent_app_number] => 11681514 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/681514
Light emitting device and method of manufacturing the same Mar 1, 2007 Issued
Array ( [id] => 4723943 [patent_doc_number] => 20080203484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'FIELD EFFECT TRANSISTOR ARRANGEMENT AND METHOD OF PRODUCING A FIELD EFFECT TRANSISTOR ARRANGEMENT' [patent_app_type] => utility [patent_app_number] => 11/678334 [patent_app_country] => US [patent_app_date] => 2007-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8022 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20080203484.pdf [firstpage_image] =>[orig_patent_app_number] => 11678334 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/678334
FIELD EFFECT TRANSISTOR ARRANGEMENT AND METHOD OF PRODUCING A FIELD EFFECT TRANSISTOR ARRANGEMENT Feb 22, 2007 Abandoned
Array ( [id] => 7527810 [patent_doc_number] => 08044404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-25 [patent_title] => 'Display apparatus and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/676753 [patent_app_country] => US [patent_app_date] => 2007-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5798 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/044/08044404.pdf [firstpage_image] =>[orig_patent_app_number] => 11676753 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/676753
Display apparatus and manufacturing method thereof Feb 19, 2007 Issued
Array ( [id] => 4870676 [patent_doc_number] => 20080197410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'HIGH VOLTAGE DEVICE WITH LOW ON-RESISTANCE' [patent_app_type] => utility [patent_app_number] => 11/676624 [patent_app_country] => US [patent_app_date] => 2007-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3010 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20080197410.pdf [firstpage_image] =>[orig_patent_app_number] => 11676624 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/676624
High voltage device with low on-resistance Feb 19, 2007 Issued
Array ( [id] => 4870606 [patent_doc_number] => 20080197340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'MULTIPLE-WAVELENGTH OPTO-ELECTRONIC DEVICE INCLUDING A SUPERLATTICE' [patent_app_type] => utility [patent_app_number] => 11/675833 [patent_app_country] => US [patent_app_date] => 2007-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6308 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20080197340.pdf [firstpage_image] =>[orig_patent_app_number] => 11675833 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/675833
Multiple-wavelength opto-electronic device including a superlattice Feb 15, 2007 Issued
Menu