Search

Kevin V. Quinto

Examiner (ID: 8233, Phone: (571)272-1920 , Office: P/2817 )

Most Active Art Unit
2826
Art Unit(s)
2826, 2817, 2821, 2829, 2893
Total Applications
1390
Issued Applications
1170
Pending Applications
65
Abandoned Applications
180

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5250506 [patent_doc_number] => 20070131962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/675223 [patent_app_country] => US [patent_app_date] => 2007-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 20823 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20070131962.pdf [firstpage_image] =>[orig_patent_app_number] => 11675223 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/675223
DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME Feb 14, 2007 Abandoned
Array ( [id] => 4489240 [patent_doc_number] => 07884485 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-02-08 [patent_title] => 'Semiconductor device interconnect systems and methods' [patent_app_type] => utility [patent_app_number] => 11/674733 [patent_app_country] => US [patent_app_date] => 2007-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 2817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/884/07884485.pdf [firstpage_image] =>[orig_patent_app_number] => 11674733 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/674733
Semiconductor device interconnect systems and methods Feb 13, 2007 Issued
Array ( [id] => 4499280 [patent_doc_number] => 07948033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-24 [patent_title] => 'Semiconductor device having trench edge termination structure' [patent_app_type] => utility [patent_app_number] => 11/671514 [patent_app_country] => US [patent_app_date] => 2007-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3590 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/948/07948033.pdf [firstpage_image] =>[orig_patent_app_number] => 11671514 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/671514
Semiconductor device having trench edge termination structure Feb 5, 2007 Issued
Array ( [id] => 5098619 [patent_doc_number] => 20070181879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/671513 [patent_app_country] => US [patent_app_date] => 2007-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4816 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20070181879.pdf [firstpage_image] =>[orig_patent_app_number] => 11671513 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/671513
DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF Feb 5, 2007 Abandoned
Array ( [id] => 4843271 [patent_doc_number] => 20080179679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'ELECTRONIC DEVICE INCLUDING INSULATING LAYERS HAVING DIFFERENT STRAINS AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 11/669794 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6830 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20080179679.pdf [firstpage_image] =>[orig_patent_app_number] => 11669794 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/669794
Electronic device including insulating layers having different strains Jan 30, 2007 Issued
Array ( [id] => 4619544 [patent_doc_number] => 07999264 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-16 [patent_title] => 'Thin film transistor array panel and display device' [patent_app_type] => utility [patent_app_number] => 11/669583 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10625 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/999/07999264.pdf [firstpage_image] =>[orig_patent_app_number] => 11669583 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/669583
Thin film transistor array panel and display device Jan 30, 2007 Issued
Array ( [id] => 4843752 [patent_doc_number] => 20080180160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'HIGH VOLTAGE DUAL GATE CMOS SWITCHING DEVICE AND METHOD' [patent_app_type] => utility [patent_app_number] => 11/669594 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3892 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20080180160.pdf [firstpage_image] =>[orig_patent_app_number] => 11669594 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/669594
HIGH VOLTAGE DUAL GATE CMOS SWITCHING DEVICE AND METHOD Jan 30, 2007 Abandoned
Array ( [id] => 122742 [patent_doc_number] => 07709893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'Circuit layout for different performance and method' [patent_app_type] => utility [patent_app_number] => 11/669704 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 1815 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/709/07709893.pdf [firstpage_image] =>[orig_patent_app_number] => 11669704 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/669704
Circuit layout for different performance and method Jan 30, 2007 Issued
Array ( [id] => 4795288 [patent_doc_number] => 20080006874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-10 [patent_title] => 'SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURING' [patent_app_type] => utility [patent_app_number] => 11/668872 [patent_app_country] => US [patent_app_date] => 2007-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5957 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20080006874.pdf [firstpage_image] =>[orig_patent_app_number] => 11668872 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/668872
Semiconductor component and method of manufacturing Jan 29, 2007 Issued
Array ( [id] => 367004 [patent_doc_number] => 07479689 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-20 [patent_title] => 'Electronically programmable fuse having anode and link surrounded by low dielectric constant material' [patent_app_type] => utility [patent_app_number] => 11/627384 [patent_app_country] => US [patent_app_date] => 2007-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2069 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/479/07479689.pdf [firstpage_image] =>[orig_patent_app_number] => 11627384 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/627384
Electronically programmable fuse having anode and link surrounded by low dielectric constant material Jan 25, 2007 Issued
Array ( [id] => 4936361 [patent_doc_number] => 20080073675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'Transistor with start-up control element' [patent_app_type] => utility [patent_app_number] => 11/657494 [patent_app_country] => US [patent_app_date] => 2007-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3447 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20080073675.pdf [firstpage_image] =>[orig_patent_app_number] => 11657494 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/657494
Start-up control device Jan 23, 2007 Issued
Array ( [id] => 197559 [patent_doc_number] => 07638852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-29 [patent_title] => 'Method of making wafer structure for backside illuminated color image sensor' [patent_app_type] => utility [patent_app_number] => 11/626664 [patent_app_country] => US [patent_app_date] => 2007-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2489 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/638/07638852.pdf [firstpage_image] =>[orig_patent_app_number] => 11626664 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/626664
Method of making wafer structure for backside illuminated color image sensor Jan 23, 2007 Issued
Array ( [id] => 4564032 [patent_doc_number] => 07838922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Electronic device including trenches and discontinuous storage elements' [patent_app_type] => utility [patent_app_number] => 11/626753 [patent_app_country] => US [patent_app_date] => 2007-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 32 [patent_no_of_words] => 14956 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/838/07838922.pdf [firstpage_image] =>[orig_patent_app_number] => 11626753 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/626753
Electronic device including trenches and discontinuous storage elements Jan 23, 2007 Issued
Array ( [id] => 4762737 [patent_doc_number] => 20080173946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'CMOS STRUCTURE INCLUDING DUAL METAL CONTAINING COMPOSITE GATES' [patent_app_type] => utility [patent_app_number] => 11/625984 [patent_app_country] => US [patent_app_date] => 2007-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6168 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20080173946.pdf [firstpage_image] =>[orig_patent_app_number] => 11625984 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/625984
CMOS structure including dual metal containing composite gates Jan 22, 2007 Issued
Array ( [id] => 5157482 [patent_doc_number] => 20070170526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'THIN-FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/625214 [patent_app_country] => US [patent_app_date] => 2007-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7859 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20070170526.pdf [firstpage_image] =>[orig_patent_app_number] => 11625214 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/625214
Thin-film transistor and manufacturing method thereof Jan 18, 2007 Issued
Array ( [id] => 8233196 [patent_doc_number] => 08198642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Light emitting diode apparatus' [patent_app_type] => utility [patent_app_number] => 11/656224 [patent_app_country] => US [patent_app_date] => 2007-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1960 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/198/08198642.pdf [firstpage_image] =>[orig_patent_app_number] => 11656224 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/656224
Light emitting diode apparatus Jan 18, 2007 Issued
Array ( [id] => 5175477 [patent_doc_number] => 20070176535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-02 [patent_title] => 'LIGHT-EMITTING MATERIAL, LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, AND ELECTRONIC APPLIANCE' [patent_app_type] => utility [patent_app_number] => 11/624563 [patent_app_country] => US [patent_app_date] => 2007-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8895 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20070176535.pdf [firstpage_image] =>[orig_patent_app_number] => 11624563 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/624563
LIGHT-EMITTING MATERIAL, LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, AND ELECTRONIC APPLIANCE Jan 17, 2007 Abandoned
Array ( [id] => 360051 [patent_doc_number] => 07485930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Method for four direction low capacitance ESD protection' [patent_app_type] => utility [patent_app_number] => 11/622574 [patent_app_country] => US [patent_app_date] => 2007-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3105 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/485/07485930.pdf [firstpage_image] =>[orig_patent_app_number] => 11622574 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/622574
Method for four direction low capacitance ESD protection Jan 11, 2007 Issued
Array ( [id] => 5019569 [patent_doc_number] => 20070145535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/651034 [patent_app_country] => US [patent_app_date] => 2007-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 17084 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20070145535.pdf [firstpage_image] =>[orig_patent_app_number] => 11651034 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/651034
Semiconductor device and method of manufacturing the same Jan 8, 2007 Issued
Array ( [id] => 4968492 [patent_doc_number] => 20070108494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING INSULATED GATE TYPE TRANSISTOR AND INSULATED GATE TYPE CAPACITANCE, AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/621177 [patent_app_country] => US [patent_app_date] => 2007-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 12540 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20070108494.pdf [firstpage_image] =>[orig_patent_app_number] => 11621177 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/621177
Semiconductor device including insulated gate type transistor and insulated gate type variable capacitance, and method of manufacturing the same Jan 8, 2007 Issued
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