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Khaja Ahmad

Examiner (ID: 16779, Phone: (571)270-7991 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
1235
Issued Applications
977
Pending Applications
114
Abandoned Applications
198

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19500388 [patent_doc_number] => 20240339406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => INTEGRATED CIRCUIT INTERCONNECT STRUCTURES WITH AIR GAPS [patent_app_type] => utility [patent_app_number] => 18/749812 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749812 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/749812
INTEGRATED CIRCUIT INTERCONNECT STRUCTURES WITH AIR GAPS Jun 20, 2024 Pending
Array ( [id] => 20175909 [patent_doc_number] => 12394664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Method of manufacturing semiconductor structure having fins [patent_app_type] => utility [patent_app_number] => 18/749924 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 2123 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749924 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/749924
Method of manufacturing semiconductor structure having fins Jun 20, 2024 Issued
Array ( [id] => 19480952 [patent_doc_number] => 20240328994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => METHOD OF MANUFACTURING A FIELD EFFECT TRANSDUCER [patent_app_type] => utility [patent_app_number] => 18/741376 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13081 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18741376 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/741376
METHOD OF MANUFACTURING A FIELD EFFECT TRANSDUCER Jun 11, 2024 Pending
Array ( [id] => 19420990 [patent_doc_number] => 20240297114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => METHODS OF FORMING SEMICONDUCTOR PACKAGES [patent_app_type] => utility [patent_app_number] => 18/663670 [patent_app_country] => US [patent_app_date] => 2024-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10123 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663670 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/663670
METHODS OF FORMING SEMICONDUCTOR PACKAGES May 13, 2024 Pending
Array ( [id] => 19940581 [patent_doc_number] => 12312703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Neutral pH copper plating solution for undercut reduction [patent_app_type] => utility [patent_app_number] => 18/654247 [patent_app_country] => US [patent_app_date] => 2024-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654247 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/654247
Neutral pH copper plating solution for undercut reduction May 2, 2024 Issued
Array ( [id] => 19384797 [patent_doc_number] => 20240274667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => Semiconductor Device and Method of Manufacture [patent_app_type] => utility [patent_app_number] => 18/644770 [patent_app_country] => US [patent_app_date] => 2024-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9836 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644770 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/644770
Semiconductor Device and Method of Manufacture Apr 23, 2024 Pending
Array ( [id] => 19913680 [patent_doc_number] => 12289913 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-04-29 [patent_title] => Device with metal field plate extension [patent_app_type] => utility [patent_app_number] => 18/642052 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18642052 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/642052
Device with metal field plate extension Apr 21, 2024 Issued
Array ( [id] => 19394865 [patent_doc_number] => 20240284735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/641354 [patent_app_country] => US [patent_app_date] => 2024-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15062 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641354 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641354
DISPLAY APPARATUS Apr 19, 2024 Pending
Array ( [id] => 19364403 [patent_doc_number] => 20240266437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/635018 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635018 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635018
Semiconductor device and method for fabricating the same Apr 14, 2024 Issued
Array ( [id] => 19349496 [patent_doc_number] => 20240258460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => EPITAXIAL OXIDE TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/629606 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 80909 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629606 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629606
Epitaxial oxide transistor Apr 7, 2024 Issued
Array ( [id] => 19364435 [patent_doc_number] => 20240266469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => EPITAXIAL OXIDE TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/629555 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 81019 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629555 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629555
Epitaxial oxide transistor Apr 7, 2024 Issued
Array ( [id] => 20004865 [patent_doc_number] => 20250143087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => DISPLAY PANEL, DISPLAY APPARATUS, AND METHOD FOR MANUFACTURING DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 18/610872 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610872 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610872
DISPLAY PANEL, DISPLAY APPARATUS, AND METHOD FOR MANUFACTURING DISPLAY PANEL Mar 19, 2024 Pending
Array ( [id] => 19452651 [patent_doc_number] => 20240312781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => METHOD FOR MAKING A RADIO FREQUENCY SILICON-ON-INSULATOR (RFSOI) WAFER INCLUDING A SUPERLATTICE [patent_app_type] => utility [patent_app_number] => 18/604620 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4464 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604620 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604620
Method for making a radio frequency silicon-on-insulator (RFSOI) wafer including a superlattice Mar 13, 2024 Issued
Array ( [id] => 19286010 [patent_doc_number] => 20240222488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => HIGH ELECTRON MOBILITY TRANSISTOR WITH DOPED SEMICONDUCTOR REGION IN GATE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/443357 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443357 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443357
High electron mobility transistor with doped semiconductor region in gate structure Feb 15, 2024 Issued
Array ( [id] => 19191699 [patent_doc_number] => 20240170612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => EPITAXIAL OXIDE TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/423986 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 80780 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18423986 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/423986
Epitaxial oxide transistor Jan 25, 2024 Issued
Array ( [id] => 19176167 [patent_doc_number] => 20240162141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => SIDEWAYS VIAS IN ISOLATION AREAS TO CONTACT INTERIOR LAYERS IN STACKED DEVICES [patent_app_type] => utility [patent_app_number] => 18/419015 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419015 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419015
Sideways vias in isolation areas to contact interior layers in stacked devices Jan 21, 2024 Issued
Array ( [id] => 20434989 [patent_doc_number] => 12506018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-23 [patent_title] => Apparatus and method for treating substrate [patent_app_type] => utility [patent_app_number] => 18/407848 [patent_app_country] => US [patent_app_date] => 2024-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1143 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407848 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/407848
Apparatus and method for treating substrate Jan 8, 2024 Issued
Array ( [id] => 19873759 [patent_doc_number] => 12266630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Bond pad connection layout [patent_app_type] => utility [patent_app_number] => 18/405875 [patent_app_country] => US [patent_app_date] => 2024-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3937 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18405875 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/405875
Bond pad connection layout Jan 4, 2024 Issued
Array ( [id] => 19951584 [patent_doc_number] => 12322958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Electrostatic discharge (ESD) protection circuit with disable feature based on hot-plug condition detection [patent_app_type] => utility [patent_app_number] => 18/396987 [patent_app_country] => US [patent_app_date] => 2023-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 2232 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18396987 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/396987
Electrostatic discharge (ESD) protection circuit with disable feature based on hot-plug condition detection Dec 26, 2023 Issued
Array ( [id] => 19781663 [patent_doc_number] => 12230702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Self-passivated nitrogen-polar III-nitride transistor [patent_app_type] => utility [patent_app_number] => 18/395249 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 82 [patent_no_of_words] => 12838 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395249 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395249
Self-passivated nitrogen-polar III-nitride transistor Dec 21, 2023 Issued
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