Search

Khaja Ahmad

Examiner (ID: 9025, Phone: (571)270-7991 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
1286
Issued Applications
1013
Pending Applications
110
Abandoned Applications
201

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19364435 [patent_doc_number] => 20240266469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => EPITAXIAL OXIDE TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/629555 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 81019 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629555 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629555
Epitaxial oxide transistor Apr 7, 2024 Issued
Array ( [id] => 19749560 [patent_doc_number] => 20250038125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => APPARATUS AND METHOD FOR FORMING EMI SHIELDING FILM [patent_app_type] => utility [patent_app_number] => 18/623309 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623309 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623309
APPARATUS AND METHOD FOR FORMING EMI SHIELDING FILM Mar 31, 2024 Pending
Array ( [id] => 20281227 [patent_doc_number] => 20250306469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => METHOD OF DEVELOPING PHOTORESIST [patent_app_type] => utility [patent_app_number] => 18/622417 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622417 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/622417
METHOD OF DEVELOPING PHOTORESIST Mar 28, 2024 Pending
Array ( [id] => 20072229 [patent_doc_number] => 20250210451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => PACKAGE STRUCTURE WITH MOLDING LAYER AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/619459 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6558 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619459 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/619459
PACKAGE STRUCTURE WITH MOLDING LAYER AND METHOD FOR MANUFACTURING THE SAME Mar 27, 2024 Pending
Array ( [id] => 19866331 [patent_doc_number] => 20250105117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => SEMICONDUCTOR PACKAGES AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/619711 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13060 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619711 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/619711
SEMICONDUCTOR PACKAGES AND METHOD OF FABRICATING THE SAME Mar 27, 2024 Pending
Array ( [id] => 20004865 [patent_doc_number] => 20250143087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => DISPLAY PANEL, DISPLAY APPARATUS, AND METHOD FOR MANUFACTURING DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 18/610872 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610872 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610872
DISPLAY PANEL, DISPLAY APPARATUS, AND METHOD FOR MANUFACTURING DISPLAY PANEL Mar 19, 2024 Pending
Array ( [id] => 19484424 [patent_doc_number] => 20240332466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => OPTICAL LAMINATE, TRANSPARENT DISPLAY INCLUDING SAME, AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 18/610186 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7148 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610186 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610186
OPTICAL LAMINATE, TRANSPARENT DISPLAY INCLUDING SAME, AND METHOD FOR MANUFACTURING SAME Mar 18, 2024 Pending
Array ( [id] => 20183059 [patent_doc_number] => 20250267017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => PHYSICALLY UNCLONABLE FUNCTION DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/607602 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18607602 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/607602
Physically unclonable function device and method for fabricating the same Mar 17, 2024 Issued
Array ( [id] => 19452651 [patent_doc_number] => 20240312781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => METHOD FOR MAKING A RADIO FREQUENCY SILICON-ON-INSULATOR (RFSOI) WAFER INCLUDING A SUPERLATTICE [patent_app_type] => utility [patent_app_number] => 18/604620 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4464 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604620 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604620
Method for making a radio frequency silicon-on-insulator (RFSOI) wafer including a superlattice Mar 13, 2024 Issued
Array ( [id] => 20223023 [patent_doc_number] => 20250285954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => PACKAGE STRUCTURE INCLUDING INACTIVE ELEMENT, ASSEMBLY STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/600988 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4557 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600988 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600988
PACKAGE STRUCTURE INCLUDING INACTIVE ELEMENT, ASSEMBLY STRUCTURE AND METHOD OF MANUFACTURING THE SAME Mar 10, 2024 Pending
Array ( [id] => 19286010 [patent_doc_number] => 20240222488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => HIGH ELECTRON MOBILITY TRANSISTOR WITH DOPED SEMICONDUCTOR REGION IN GATE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/443357 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443357 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443357
High electron mobility transistor with doped semiconductor region in gate structure Feb 15, 2024 Issued
Array ( [id] => 20104602 [patent_doc_number] => 20250234538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => SEMICONDUCTOR DEVICE WITH SIDEWALL OXIDIZED DIELECTRIC [patent_app_type] => utility [patent_app_number] => 18/443640 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443640 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443640
SEMICONDUCTOR DEVICE WITH SIDEWALL OXIDIZED DIELECTRIC Feb 15, 2024 Pending
Array ( [id] => 19221522 [patent_doc_number] => 20240186226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 18/439747 [patent_app_country] => US [patent_app_date] => 2024-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5782 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439747 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/439747
SEMICONDUCTOR DEVICE PACKAGE Feb 11, 2024 Pending
Array ( [id] => 19384755 [patent_doc_number] => 20240274625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => METHOD AND APPARATUS FOR MANUFACTURING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/432861 [patent_app_country] => US [patent_app_date] => 2024-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18432861 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/432861
METHOD AND APPARATUS FOR MANUFACTURING DISPLAY DEVICE Feb 4, 2024 Pending
Array ( [id] => 19548560 [patent_doc_number] => 20240365596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => DISPLAY PANEL HAVING BARRIER WALL AND METHOD OF PROVIDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/425686 [patent_app_country] => US [patent_app_date] => 2024-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18425686 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/425686
DISPLAY PANEL HAVING BARRIER WALL AND METHOD OF PROVIDING THE SAME Jan 28, 2024 Pending
Array ( [id] => 19436032 [patent_doc_number] => 20240304530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => POWER CONVERTER APPARATUS [patent_app_type] => utility [patent_app_number] => 18/425703 [patent_app_country] => US [patent_app_date] => 2024-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18425703 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/425703
POWER CONVERTER APPARATUS Jan 28, 2024 Pending
Array ( [id] => 19191699 [patent_doc_number] => 20240170612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => EPITAXIAL OXIDE TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/423986 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 80780 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18423986 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/423986
Epitaxial oxide transistor Jan 25, 2024 Issued
Array ( [id] => 20019651 [patent_doc_number] => 20250157873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => DUAL-SIDE HEAT-DISSIPATION PACKAGE STRUCTURE AND PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/423499 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18423499 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/423499
Dual-side heat-dissipation package structure and package structure Jan 25, 2024 Issued
Array ( [id] => 19176167 [patent_doc_number] => 20240162141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => SIDEWAYS VIAS IN ISOLATION AREAS TO CONTACT INTERIOR LAYERS IN STACKED DEVICES [patent_app_type] => utility [patent_app_number] => 18/419015 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419015 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419015
Sideways vias in isolation areas to contact interior layers in stacked devices Jan 21, 2024 Issued
Array ( [id] => 20104601 [patent_doc_number] => 20250234537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => SEMICONDUCTOR DEVICE WITH SIDEWALL OXIDIZED DIELECTRIC [patent_app_type] => utility [patent_app_number] => 18/409990 [patent_app_country] => US [patent_app_date] => 2024-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4352 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18409990 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/409990
SEMICONDUCTOR DEVICE WITH SIDEWALL OXIDIZED DIELECTRIC Jan 10, 2024 Pending
Menu