Search

Khaja Ahmad

Examiner (ID: 2568, Phone: (571)270-7991 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
1264
Issued Applications
995
Pending Applications
111
Abandoned Applications
198

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15488719 [patent_doc_number] => 10559724 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-11 [patent_title] => Light emitting device and method of manufacturing same [patent_app_type] => utility [patent_app_number] => 15/783514 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 26 [patent_no_of_words] => 9765 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783514 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783514
Light emitting device and method of manufacturing same Oct 12, 2017 Issued
Array ( [id] => 12650571 [patent_doc_number] => 20180108688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => THIN FILM TRANSISTOR, METHOD FOR FABRICATING THE SAME, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/783461 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4267 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783461 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783461
Thin film transistor, method for fabricating the same, and display device Oct 12, 2017 Issued
Array ( [id] => 14163681 [patent_doc_number] => 20190108943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => HIGH VOLTAGE CAPACITORS AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/730508 [patent_app_country] => US [patent_app_date] => 2017-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6698 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15730508 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/730508
HIGH VOLTAGE CAPACITORS AND METHODS OF MANUFACTURING THE SAME Oct 10, 2017 Abandoned
Array ( [id] => 16180575 [patent_doc_number] => 20200227544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => GALLIUM NITRIDE TRANSISTORS WITH DRAIN FIELD PLATES AND THEIR METHODS OF FABRICATION [patent_app_type] => utility [patent_app_number] => 16/651326 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16651326 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/651326
GALLIUM NITRIDE TRANSISTORS WITH DRAIN FIELD PLATES AND THEIR METHODS OF FABRICATION Sep 27, 2017 Abandoned
Array ( [id] => 17847871 [patent_doc_number] => 11437255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Epitaxial III-N nanoribbon structures for device fabrication [patent_app_type] => utility [patent_app_number] => 16/642833 [patent_app_country] => US [patent_app_date] => 2017-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 36 [patent_no_of_words] => 12937 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16642833 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/642833
Epitaxial III-N nanoribbon structures for device fabrication Sep 26, 2017 Issued
Array ( [id] => 14110117 [patent_doc_number] => 20190096734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => Wafer Table with Dynamic Support Pins [patent_app_type] => utility [patent_app_number] => 15/716042 [patent_app_country] => US [patent_app_date] => 2017-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6964 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15716042 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/716042
Wafer table with dynamic support pins Sep 25, 2017 Issued
Array ( [id] => 16578807 [patent_doc_number] => 20210013208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => GATED THYRISTORS [patent_app_type] => utility [patent_app_number] => 16/630550 [patent_app_country] => US [patent_app_date] => 2017-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12610 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16630550 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/630550
GATED THYRISTORS Sep 13, 2017 Abandoned
Array ( [id] => 14671835 [patent_doc_number] => 10373837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 15/705014 [patent_app_country] => US [patent_app_date] => 2017-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4512 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15705014 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/705014
Memory device Sep 13, 2017 Issued
Array ( [id] => 13724361 [patent_doc_number] => 20170373136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-28 [patent_title] => Integrated Circuit Devices Having Features With Reduced Edge Curvature and Methods for Manufacturing the Same [patent_app_type] => utility [patent_app_number] => 15/698552 [patent_app_country] => US [patent_app_date] => 2017-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15698552 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/698552
Integrated circuit devices having features with reduced edge curvature and methods for manufacturing the same Sep 6, 2017 Issued
Array ( [id] => 13283625 [patent_doc_number] => 10153404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-11 [patent_title] => LED with high thermal conductivity particles in phosphor conversion layer [patent_app_type] => utility [patent_app_number] => 15/697087 [patent_app_country] => US [patent_app_date] => 2017-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 2948 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15697087 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/697087
LED with high thermal conductivity particles in phosphor conversion layer Sep 5, 2017 Issued
Array ( [id] => 15105339 [patent_doc_number] => 10473991 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Manufacturing method of liquid crystal display panel [patent_app_type] => utility [patent_app_number] => 15/573317 [patent_app_country] => US [patent_app_date] => 2017-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4392 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15573317 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/573317
Manufacturing method of liquid crystal display panel Aug 28, 2017 Issued
Array ( [id] => 13630077 [patent_doc_number] => 20180366591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => THRESHOLD SWITCHING DEVICE [patent_app_type] => utility [patent_app_number] => 15/687962 [patent_app_country] => US [patent_app_date] => 2017-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687962 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/687962
THRESHOLD SWITCHING DEVICE Aug 27, 2017 Abandoned
Array ( [id] => 12122298 [patent_doc_number] => 20180005884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'AGGRESSIVE TIP-TO-TIP SCALING USING SUBTRACTIVE INTEGRATION' [patent_app_type] => utility [patent_app_number] => 15/681552 [patent_app_country] => US [patent_app_date] => 2017-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2963 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15681552 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/681552
Aggressive tip-to-tip scaling using subtractive integration Aug 20, 2017 Issued
Array ( [id] => 17085621 [patent_doc_number] => 20210280628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => METHOD FOR CONNECTING CROSS-COMPONENTS AT OPTIMISED DENSITY [patent_app_type] => utility [patent_app_number] => 16/325095 [patent_app_country] => US [patent_app_date] => 2017-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8729 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16325095 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/325095
METHOD FOR CONNECTING CROSS-COMPONENTS AT OPTIMISED DENSITY Aug 17, 2017 Abandoned
Array ( [id] => 13808437 [patent_doc_number] => 10181487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-15 [patent_title] => High reliability housing for a semiconductor package [patent_app_type] => utility [patent_app_number] => 15/679373 [patent_app_country] => US [patent_app_date] => 2017-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2483 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15679373 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/679373
High reliability housing for a semiconductor package Aug 16, 2017 Issued
Array ( [id] => 13271417 [patent_doc_number] => 10147795 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-12-04 [patent_title] => Tunneling field effect transistor and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 15/674526 [patent_app_country] => US [patent_app_date] => 2017-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4600 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15674526 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/674526
Tunneling field effect transistor and method of fabricating the same Aug 10, 2017 Issued
Array ( [id] => 12208561 [patent_doc_number] => 20180053788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'BACKPLANE FOR DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/674647 [patent_app_country] => US [patent_app_date] => 2017-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7322 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15674647 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/674647
BACKPLANE FOR DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME Aug 10, 2017 Abandoned
Array ( [id] => 14446253 [patent_doc_number] => 20190181000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => SUPPORTING SUBSTRATE, SUPPORTING SUBSTRATE-ATTACHED LAMINATE AND METHOD FOR MANUFACTURING A PACKAGE SUBSTRATE FOR MOUNTING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/323172 [patent_app_country] => US [patent_app_date] => 2017-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16860 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16323172 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/323172
Supporting substrate, supporting substrate-attached laminate and method for manufacturing a package substrate for mounting a semiconductor device Aug 3, 2017 Issued
Array ( [id] => 12838159 [patent_doc_number] => 20180171226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => WET ETCH CHEMISTRY FOR SELECTIVE SILICON ETCH [patent_app_type] => utility [patent_app_number] => 15/657537 [patent_app_country] => US [patent_app_date] => 2017-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15657537 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/657537
Wet etch chemistry for selective silicon etch Jul 23, 2017 Issued
Array ( [id] => 13893331 [patent_doc_number] => 10199218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Method for manufacturing group III-V nitride semiconductor epitaxial wafer [patent_app_type] => utility [patent_app_number] => 15/657242 [patent_app_country] => US [patent_app_date] => 2017-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3743 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15657242 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/657242
Method for manufacturing group III-V nitride semiconductor epitaxial wafer Jul 23, 2017 Issued
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