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Khaja Ahmad

Examiner (ID: 2568, Phone: (571)270-7991 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
1264
Issued Applications
995
Pending Applications
111
Abandoned Applications
198

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12122386 [patent_doc_number] => 20180005972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'INTERFACE STRUCTURES FOR PACKAGED CIRCUITRY AND METHOD OF PROVIDING SAME' [patent_app_type] => utility [patent_app_number] => 15/201332 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9156 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201332 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201332
INTERFACE STRUCTURES FOR PACKAGED CIRCUITRY AND METHOD OF PROVIDING SAME Jun 30, 2016 Abandoned
Array ( [id] => 12201709 [patent_doc_number] => 09904776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-27 [patent_title] => 'Fingerprint sensor pixel array and methods of forming same' [patent_app_type] => utility [patent_app_number] => 15/200871 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 38 [patent_no_of_words] => 11065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15200871 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/200871
Fingerprint sensor pixel array and methods of forming same Jun 30, 2016 Issued
Array ( [id] => 11517538 [patent_doc_number] => 20170084612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-23 [patent_title] => 'GATE PLANARITY FOR FINFET USING DUMMY POLISH STOP' [patent_app_type] => utility [patent_app_number] => 15/195174 [patent_app_country] => US [patent_app_date] => 2016-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4333 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15195174 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/195174
Gate planarity for FinFET using dummy polish stop Jun 27, 2016 Issued
Array ( [id] => 11965258 [patent_doc_number] => 20170269411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'METHOD OF MANUFACTURING ARRAY SUBSTRATE AND ARRAY SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 15/502561 [patent_app_country] => US [patent_app_date] => 2016-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5577 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15502561 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/502561
Method of manufacturing array substrate and array substrate Jun 12, 2016 Issued
Array ( [id] => 14300913 [patent_doc_number] => 10290588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Ultra-thin semiconductor component fabrication using a dielectric skeleton structure [patent_app_type] => utility [patent_app_number] => 15/175263 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3403 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175263 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175263
Ultra-thin semiconductor component fabrication using a dielectric skeleton structure Jun 6, 2016 Issued
Array ( [id] => 12095518 [patent_doc_number] => 20170352611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-07 [patent_title] => 'PRODUCING WAFER LEVEL PACKAGING USING LEADFRAME STRIP AND RELATED DEVICE' [patent_app_type] => utility [patent_app_number] => 15/175290 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2505 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175290 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175290
Producing wafer level packaging using leadframe strip and related device Jun 6, 2016 Issued
Array ( [id] => 11952425 [patent_doc_number] => 20170256576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-07 [patent_title] => 'HIGH RELIABILITY HOUSING FOR A SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 15/175226 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2466 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175226 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175226
HIGH RELIABILITY HOUSING FOR A SEMICONDUCTOR PACKAGE Jun 6, 2016 Abandoned
Array ( [id] => 11096840 [patent_doc_number] => 20160293809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'FLIP CHIP LIGHT EMITTING DIODE PACKAGE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/175019 [patent_app_country] => US [patent_app_date] => 2016-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3747 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175019 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175019
FLIP CHIP LIGHT EMITTING DIODE PACKAGE STRUCTURE Jun 5, 2016 Abandoned
Array ( [id] => 11753563 [patent_doc_number] => 09711581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Display unit' [patent_app_type] => utility [patent_app_number] => 15/172899 [patent_app_country] => US [patent_app_date] => 2016-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 26 [patent_no_of_words] => 8256 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15172899 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/172899
Display unit Jun 2, 2016 Issued
Array ( [id] => 11539546 [patent_doc_number] => 09613962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-04 [patent_title] => 'Fin liner integration under aggressive pitch' [patent_app_type] => utility [patent_app_number] => 15/172201 [patent_app_country] => US [patent_app_date] => 2016-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3020 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15172201 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/172201
Fin liner integration under aggressive pitch Jun 2, 2016 Issued
Array ( [id] => 11071205 [patent_doc_number] => 20160268168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'SEMICONDUCTOR ARRANGEMENT' [patent_app_type] => utility [patent_app_number] => 15/160206 [patent_app_country] => US [patent_app_date] => 2016-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160206 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/160206
Semiconductor arrangement May 19, 2016 Issued
Array ( [id] => 11071228 [patent_doc_number] => 20160268192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'Interconnect Structure and Method of Forming the Same' [patent_app_type] => utility [patent_app_number] => 15/160414 [patent_app_country] => US [patent_app_date] => 2016-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6622 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160414 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/160414
Interconnect structure and method of forming the same May 19, 2016 Issued
Array ( [id] => 14011781 [patent_doc_number] => 10224367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Selector device incorporating conductive clusters for memory applications [patent_app_type] => utility [patent_app_number] => 15/157607 [patent_app_country] => US [patent_app_date] => 2016-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 4258 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15157607 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/157607
Selector device incorporating conductive clusters for memory applications May 17, 2016 Issued
Array ( [id] => 11050882 [patent_doc_number] => 20160247841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'LIGHT ABSORPTION APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/147847 [patent_app_country] => US [patent_app_date] => 2016-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 14378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15147847 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/147847
Light absorption apparatus May 4, 2016 Issued
Array ( [id] => 11273932 [patent_doc_number] => 20160336479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'SEMICONDUCTOR LIGHT-EMITTING DEVICE AND SEMICONDUCTOR LIGHT-EMITTING DEVICE ARRAY' [patent_app_type] => utility [patent_app_number] => 15/144267 [patent_app_country] => US [patent_app_date] => 2016-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8277 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144267 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/144267
Semiconductor light-emitting device and semiconductor light-emitting device array May 1, 2016 Issued
Array ( [id] => 13019025 [patent_doc_number] => 10032628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Source/drain performance through conformal solid state doping [patent_app_type] => utility [patent_app_number] => 15/144481 [patent_app_country] => US [patent_app_date] => 2016-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3874 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144481 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/144481
Source/drain performance through conformal solid state doping May 1, 2016 Issued
Array ( [id] => 11578936 [patent_doc_number] => 09634206 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-25 [patent_title] => 'LED luminaire' [patent_app_type] => utility [patent_app_number] => 15/144161 [patent_app_country] => US [patent_app_date] => 2016-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 33 [patent_no_of_words] => 5425 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144161 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/144161
LED luminaire May 1, 2016 Issued
Array ( [id] => 11132346 [patent_doc_number] => 20160329321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-10 [patent_title] => 'HIGH DENSITY CAPACITORS FORMED FROM THIN VERTICAL SEMICONDUCTOR STRUCTURES SUCH AS FINFETS' [patent_app_type] => utility [patent_app_number] => 15/144657 [patent_app_country] => US [patent_app_date] => 2016-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5427 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144657 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/144657
High density capacitors formed from thin vertical semiconductor structures such as FinFETs May 1, 2016 Issued
Array ( [id] => 13306957 [patent_doc_number] => 20180205015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => PREPARATION METHOD OF CU-BASED RESISTIVE RANDOM ACCESS MEMORY, AND MEMORY [patent_app_type] => utility [patent_app_number] => 15/744064 [patent_app_country] => US [patent_app_date] => 2016-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3406 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15744064 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/744064
Preparation method of Cu-based resistive random access memory, and memory Apr 21, 2016 Issued
Array ( [id] => 17033057 [patent_doc_number] => 11094877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Method for making MRAM with small dimension and high qulity [patent_app_type] => utility [patent_app_number] => 15/081875 [patent_app_country] => US [patent_app_date] => 2016-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 2623 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15081875 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/081875
Method for making MRAM with small dimension and high qulity Mar 25, 2016 Issued
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