Search

Khanh B. Duong

Examiner (ID: 11457)

Most Active Art Unit
2822
Art Unit(s)
2822
Total Applications
696
Issued Applications
594
Pending Applications
7
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4660983 [patent_doc_number] => 20080251890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'Method of Forming Buffer Layer for Nitride Compound Semiconductor Light Emitting Device and Nitride Compound Semiconductor Light Emitting Device Having the Buffer Layer' [patent_app_type] => utility [patent_app_number] => 12/093039 [patent_app_country] => US [patent_app_date] => 2007-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2271 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20080251890.pdf [firstpage_image] =>[orig_patent_app_number] => 12093039 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/093039
Method of forming buffer layer for nitride compound semiconductor light emitting device and nitride compound semiconductor light emitting device having the buffer layer Mar 8, 2007 Issued
Array ( [id] => 53729 [patent_doc_number] => 07767502 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-03 [patent_title] => 'Method for manufacturing electronic device using thin film transistor with protective cap over flexible substrate' [patent_app_type] => utility [patent_app_number] => 11/702057 [patent_app_country] => US [patent_app_date] => 2007-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 40 [patent_no_of_words] => 6169 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/767/07767502.pdf [firstpage_image] =>[orig_patent_app_number] => 11702057 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/702057
Method for manufacturing electronic device using thin film transistor with protective cap over flexible substrate Feb 4, 2007 Issued
Array ( [id] => 7492393 [patent_doc_number] => 08030754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-04 [patent_title] => 'Chip cooling channels formed in wafer bonding gap' [patent_app_type] => utility [patent_app_number] => 11/701317 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7965 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/030/08030754.pdf [firstpage_image] =>[orig_patent_app_number] => 11701317 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701317
Chip cooling channels formed in wafer bonding gap Jan 30, 2007 Issued
Array ( [id] => 63637 [patent_doc_number] => 07759174 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-20 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/657088 [patent_app_country] => US [patent_app_date] => 2007-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 148 [patent_no_of_words] => 11813 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/759/07759174.pdf [firstpage_image] =>[orig_patent_app_number] => 11657088 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/657088
Method of manufacturing a semiconductor device Jan 23, 2007 Issued
Array ( [id] => 141899 [patent_doc_number] => 07691687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-06 [patent_title] => 'Method for processing laser-irradiated thin films having variable thickness' [patent_app_type] => utility [patent_app_number] => 11/651305 [patent_app_country] => US [patent_app_date] => 2007-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 9010 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/691/07691687.pdf [firstpage_image] =>[orig_patent_app_number] => 11651305 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/651305
Method for processing laser-irradiated thin films having variable thickness Jan 8, 2007 Issued
Array ( [id] => 4932979 [patent_doc_number] => 20080003754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'Method of forming gate of flash memory device' [patent_app_type] => utility [patent_app_number] => 11/646777 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1455 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20080003754.pdf [firstpage_image] =>[orig_patent_app_number] => 11646777 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/646777
Method of forming gate of flash memory device Dec 27, 2006 Issued
Array ( [id] => 4988768 [patent_doc_number] => 20070155107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'High-voltage semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/645657 [patent_app_country] => US [patent_app_date] => 2006-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4134 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20070155107.pdf [firstpage_image] =>[orig_patent_app_number] => 11645657 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/645657
Method of manufacturing high-voltage semiconductor device and low-voltage semiconductor device Dec 26, 2006 Issued
Array ( [id] => 318599 [patent_doc_number] => 07521308 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-21 [patent_title] => 'Dual layer stress liner for MOSFETS' [patent_app_type] => utility [patent_app_number] => 11/616147 [patent_app_country] => US [patent_app_date] => 2006-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1830 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/521/07521308.pdf [firstpage_image] =>[orig_patent_app_number] => 11616147 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/616147
Dual layer stress liner for MOSFETS Dec 25, 2006 Issued
Array ( [id] => 4879855 [patent_doc_number] => 20080153238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Method for forming a most device with reduced transient enhanced diffusion' [patent_app_type] => utility [patent_app_number] => 11/644077 [patent_app_country] => US [patent_app_date] => 2006-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2125 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20080153238.pdf [firstpage_image] =>[orig_patent_app_number] => 11644077 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/644077
Method for forming a MOS device with reduced transient enhanced diffusion Dec 20, 2006 Issued
Array ( [id] => 5034827 [patent_doc_number] => 20070099366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'LANTHANUM ALUMINUM OXIDE DIELECTRIC LAYER' [patent_app_type] => utility [patent_app_number] => 11/608286 [patent_app_country] => US [patent_app_date] => 2006-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10120 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20070099366.pdf [firstpage_image] =>[orig_patent_app_number] => 11608286 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/608286
Method of fabricating an apparatus having a lanthanum-metal oxide dielectric layer Dec 7, 2006 Issued
Array ( [id] => 5007599 [patent_doc_number] => 20070278076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'SWITCHING ELEMENT, SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/566937 [patent_app_country] => US [patent_app_date] => 2006-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 21696 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20070278076.pdf [firstpage_image] =>[orig_patent_app_number] => 11566937 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/566937
Switching element, semiconductor device and method of manufacturing the same Dec 4, 2006 Issued
Array ( [id] => 4644360 [patent_doc_number] => 08021965 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-09-20 [patent_title] => 'Inter-chip communication' [patent_app_type] => utility [patent_app_number] => 11/599374 [patent_app_country] => US [patent_app_date] => 2006-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 100 [patent_no_of_words] => 13398 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/021/08021965.pdf [firstpage_image] =>[orig_patent_app_number] => 11599374 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/599374
Inter-chip communication Nov 14, 2006 Issued
Array ( [id] => 9183768 [patent_doc_number] => 08623700 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-01-07 [patent_title] => 'Inter-chip communication' [patent_app_type] => utility [patent_app_number] => 11/599283 [patent_app_country] => US [patent_app_date] => 2006-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 100 [patent_no_of_words] => 13399 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11599283 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/599283
Inter-chip communication Nov 14, 2006 Issued
Array ( [id] => 160035 [patent_doc_number] => 07675073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-09 [patent_title] => 'Integrated circuit package provided with cooperatively arranged illumination and sensing capabilities' [patent_app_type] => utility [patent_app_number] => 11/591955 [patent_app_country] => US [patent_app_date] => 2006-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 3929 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/675/07675073.pdf [firstpage_image] =>[orig_patent_app_number] => 11591955 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/591955
Integrated circuit package provided with cooperatively arranged illumination and sensing capabilities Oct 31, 2006 Issued
Array ( [id] => 303549 [patent_doc_number] => 07534686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-19 [patent_title] => 'Multi-structured Si-fin and method of manufacture' [patent_app_type] => utility [patent_app_number] => 11/589718 [patent_app_country] => US [patent_app_date] => 2006-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 40 [patent_no_of_words] => 6885 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/534/07534686.pdf [firstpage_image] =>[orig_patent_app_number] => 11589718 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/589718
Multi-structured Si-fin and method of manufacture Oct 30, 2006 Issued
Array ( [id] => 330415 [patent_doc_number] => 07510910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-31 [patent_title] => 'Semiconductor device and production method thereof' [patent_app_type] => utility [patent_app_number] => 11/588315 [patent_app_country] => US [patent_app_date] => 2006-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 4562 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/510/07510910.pdf [firstpage_image] =>[orig_patent_app_number] => 11588315 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/588315
Semiconductor device and production method thereof Oct 26, 2006 Issued
Array ( [id] => 4893490 [patent_doc_number] => 20080102588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'METHOD FOR FORMING MOS TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 11/552957 [patent_app_country] => US [patent_app_date] => 2006-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3281 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20080102588.pdf [firstpage_image] =>[orig_patent_app_number] => 11552957 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/552957
Method for forming MOS transistor Oct 24, 2006 Issued
Array ( [id] => 4460124 [patent_doc_number] => 07879631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Systems and methods for on-die light sensing with low leakage' [patent_app_type] => utility [patent_app_number] => 11/588198 [patent_app_country] => US [patent_app_date] => 2006-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 3587 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/879/07879631.pdf [firstpage_image] =>[orig_patent_app_number] => 11588198 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/588198
Systems and methods for on-die light sensing with low leakage Oct 23, 2006 Issued
Array ( [id] => 348768 [patent_doc_number] => 07494883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-24 [patent_title] => 'Semiconductor device having a trench isolation and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/543213 [patent_app_country] => US [patent_app_date] => 2006-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 103 [patent_no_of_words] => 21110 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/494/07494883.pdf [firstpage_image] =>[orig_patent_app_number] => 11543213 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/543213
Semiconductor device having a trench isolation and method of fabricating the same Oct 4, 2006 Issued
Array ( [id] => 5034824 [patent_doc_number] => 20070099363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/520827 [patent_app_country] => US [patent_app_date] => 2006-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6121 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20070099363.pdf [firstpage_image] =>[orig_patent_app_number] => 11520827 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/520827
Method of manufacturing semiconductor device Sep 13, 2006 Abandoned
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