Khanh B. Duong

Array ( [id] => 6918181 [patent_doc_number] => 20050095742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Method of fabricating MEMS devices on a silicon wafer' [patent_app_type] => utility [patent_app_number] => 10/986354 [patent_app_country] => US [patent_app_date] => 2004-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1418 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20050095742.pdf [firstpage_image] =>[orig_patent_app_number] => 10986354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6958659 [patent_doc_number] => 20050215029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Method for fixing wafer used in manufacturing procedure' [patent_app_type] => utility [patent_app_number] => 10/972797 [patent_app_country] => US [patent_app_date] => 2004-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1470 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20050215029.pdf [firstpage_image] =>[orig_patent_app_number] => 10972797 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7235579 [patent_doc_number] => 20050079735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-14 [patent_title] => 'Substrate for electronic device, method for manufacturing substrate for electronic device, and electronic device' [patent_app_type] => utility [patent_app_number] => 10/968957 [patent_app_country] => US [patent_app_date] => 2004-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10432 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20050079735.pdf [firstpage_image] =>[orig_patent_app_number] => 10968957 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7203948 [patent_doc_number] => 20050042839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Vacuum package fabrication of integrated circuit components' [patent_app_type] => utility [patent_app_number] => 10/967764 [patent_app_country] => US [patent_app_date] => 2004-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3302 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20050042839.pdf [firstpage_image] =>[orig_patent_app_number] => 10967764 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7617125 [patent_doc_number] => 06946315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-20 [patent_title] => 'Manufacturing methods of MEMS device' [patent_app_type] => utility [patent_app_number] => 10/961162 [patent_app_country] => US [patent_app_date] => 2004-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 38 [patent_no_of_words] => 8060 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/946/06946315.pdf [firstpage_image] =>[orig_patent_app_number] => 10961162 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6939280 [patent_doc_number] => 20050112843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Method for anodic bonding of wafers and device' [patent_app_type] => utility [patent_app_number] => 10/956997 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3522 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20050112843.pdf [firstpage_image] =>[orig_patent_app_number] => 10956997 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5720838 [patent_doc_number] => 20060073613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Ferroelectric memory cells and methods for fabricating ferroelectric memory cells and ferroelectric capacitors thereof' [patent_app_type] => utility [patent_app_number] => 10/952987 [patent_app_country] => US [patent_app_date] => 2004-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7778 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20060073613.pdf [firstpage_image] =>[orig_patent_app_number] => 10952987 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 641698 [patent_doc_number] => 07122397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-17 [patent_title] => 'Method for manufacturing CMOS image sensor' [patent_app_type] => utility [patent_app_number] => 10/948567 [patent_app_country] => US [patent_app_date] => 2004-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 2359 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/122/07122397.pdf [firstpage_image] =>[orig_patent_app_number] => 10948567 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 542051 [patent_doc_number] => 07169678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-30 [patent_title] => 'Method of forming a semiconductor device using a silicide etching mask' [patent_app_type] => utility [patent_app_number] => 10/950017 [patent_app_country] => US [patent_app_date] => 2004-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 1429 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/169/07169678.pdf [firstpage_image] =>[orig_patent_app_number] => 10950017 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7104063 [patent_doc_number] => 20050106789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Method for producing an SOI field effect transistor and corresponding field effect transistor' [patent_app_type] => utility [patent_app_number] => 10/948637 [patent_app_country] => US [patent_app_date] => 2004-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8293 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20050106789.pdf [firstpage_image] =>[orig_patent_app_number] => 10948637 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6926014 [patent_doc_number] => 20050239269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Method for releasing stress of embedded chip and chip embedded structure' [patent_app_type] => utility [patent_app_number] => 10/947357 [patent_app_country] => US [patent_app_date] => 2004-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2023 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20050239269.pdf [firstpage_image] =>[orig_patent_app_number] => 10947357 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 650882 [patent_doc_number] => 07112459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-26 [patent_title] => 'Thin film transistor liquid crystal display and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 10/947747 [patent_app_country] => US [patent_app_date] => 2004-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 1980 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/112/07112459.pdf [firstpage_image] =>[orig_patent_app_number] => 10947747 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 521327 [patent_doc_number] => 07186587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-06 [patent_title] => 'Singulation method used in image sensor packaging process and support for use therein' [patent_app_type] => utility [patent_app_number] => 10/944197 [patent_app_country] => US [patent_app_date] => 2004-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2354 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/186/07186587.pdf [firstpage_image] =>[orig_patent_app_number] => 10944197 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 401193 [patent_doc_number] => 07291557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-06 [patent_title] => 'Method for forming an interconnection structure for ic metallization' [patent_app_type] => utility [patent_app_number] => 10/940147 [patent_app_country] => US [patent_app_date] => 2004-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2785 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/291/07291557.pdf [firstpage_image] =>[orig_patent_app_number] => 10940147 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 348823 [patent_doc_number] => 07494939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-24 [patent_title] => 'Methods for forming a lanthanum-metal oxide dielectric layer' [patent_app_type] => utility [patent_app_number] => 10/930167 [patent_app_country] => US [patent_app_date] => 2004-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 10012 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/494/07494939.pdf [firstpage_image] =>[orig_patent_app_number] => 10930167 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5903466 [patent_doc_number] => 20060046391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array' [patent_app_type] => utility [patent_app_number] => 10/928317 [patent_app_country] => US [patent_app_date] => 2004-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 12016 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20060046391.pdf [firstpage_image] =>[orig_patent_app_number] => 10928317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 587163 [patent_doc_number] => 07439152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-21 [patent_title] => 'Methods of forming a plurality of capacitors' [patent_app_type] => utility [patent_app_number] => 10/929037 [patent_app_country] => US [patent_app_date] => 2004-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 4090 [patent_no_of_claims] => 67 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/439/07439152.pdf [firstpage_image] =>[orig_patent_app_number] => 10929037 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5903570 [patent_doc_number] => 20060046448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Facilitating removal of sacrificial layers via implantation to form replacement metal gates' [patent_app_type] => utility [patent_app_number] => 10/925517 [patent_app_country] => US [patent_app_date] => 2004-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5147 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20060046448.pdf [firstpage_image] =>[orig_patent_app_number] => 10925517 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 467304 [patent_doc_number] => 07235462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-26 [patent_title] => 'Methods for fabricating a substrate' [patent_app_type] => utility [patent_app_number] => 10/922997 [patent_app_country] => US [patent_app_date] => 2004-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6998 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/235/07235462.pdf [firstpage_image] =>[orig_patent_app_number] => 10922997 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5820587 [patent_doc_number] => 20060024900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Interposer including at least one passive element at least partially defined by a recess formed therein, method of manufacture, system including same, and wafer-scale interposer' [patent_app_type] => utility [patent_app_number] => 10/923437 [patent_app_country] => US [patent_app_date] => 2004-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9474 [patent_no_of_claims] => 75 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20060024900.pdf [firstpage_image] =>[orig_patent_app_number] => 10923437 [rel_patent_id] =>[rel_patent_doc_number] =>)