Search

Khanh B. Duong

Examiner (ID: 11457)

Most Active Art Unit
2822
Art Unit(s)
2822
Total Applications
696
Issued Applications
594
Pending Applications
7
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 785216 [patent_doc_number] => 06989308 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'Method of forming FinFET gates without long etches' [patent_app_type] => utility [patent_app_number] => 10/798907 [patent_app_country] => US [patent_app_date] => 2004-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2862 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/989/06989308.pdf [firstpage_image] =>[orig_patent_app_number] => 10798907 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/798907
Method of forming FinFET gates without long etches Mar 10, 2004 Issued
Array ( [id] => 439199 [patent_doc_number] => 07259045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-21 [patent_title] => 'Method for fabricating a thin film transistor using a half-tone mask' [patent_app_type] => utility [patent_app_number] => 10/795787 [patent_app_country] => US [patent_app_date] => 2004-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 49 [patent_no_of_words] => 8448 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/259/07259045.pdf [firstpage_image] =>[orig_patent_app_number] => 10795787 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/795787
Method for fabricating a thin film transistor using a half-tone mask Mar 7, 2004 Issued
Array ( [id] => 6944912 [patent_doc_number] => 20050196961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Method for forming a semiconductor device having metal silicide' [patent_app_type] => utility [patent_app_number] => 10/795847 [patent_app_country] => US [patent_app_date] => 2004-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2920 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20050196961.pdf [firstpage_image] =>[orig_patent_app_number] => 10795847 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/795847
Method for forming a semiconductor device having metal silicide Mar 7, 2004 Abandoned
Array ( [id] => 698822 [patent_doc_number] => 07067352 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-27 [patent_title] => 'Vertical integrated package apparatus and method' [patent_app_type] => utility [patent_app_number] => 10/796887 [patent_app_country] => US [patent_app_date] => 2004-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 26 [patent_no_of_words] => 6491 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/067/07067352.pdf [firstpage_image] =>[orig_patent_app_number] => 10796887 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/796887
Vertical integrated package apparatus and method Mar 7, 2004 Issued
Array ( [id] => 4745823 [patent_doc_number] => 20080090425 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2008-04-17 [patent_title] => 'Two-step post nitridation annealing for lower EOT plasma nitrided gate dielectrics' [patent_app_type] => utility [patent_app_number] => 10/794707 [patent_app_country] => US [patent_app_date] => 2004-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5440 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A9/0090/20080090425.pdf [firstpage_image] =>[orig_patent_app_number] => 10794707 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/794707
Two-step post nitridation annealing for lower EOT plasma nitrided gate dielectrics Mar 3, 2004 Abandoned
Array ( [id] => 7127427 [patent_doc_number] => 20050059171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Method of laser annealing to form an epitaxial growth layer' [patent_app_type] => utility [patent_app_number] => 10/794357 [patent_app_country] => US [patent_app_date] => 2004-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3895 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20050059171.pdf [firstpage_image] =>[orig_patent_app_number] => 10794357 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/794357
Method of laser annealing to form an epitaxial growth layer Mar 3, 2004 Issued
Array ( [id] => 4745823 [patent_doc_number] => 20080090425 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2008-04-17 [patent_title] => 'Two-step post nitridation annealing for lower EOT plasma nitrided gate dielectrics' [patent_app_type] => utility [patent_app_number] => 10/794707 [patent_app_country] => US [patent_app_date] => 2004-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5440 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A9/0090/20080090425.pdf [firstpage_image] =>[orig_patent_app_number] => 10794707 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/794707
Two-step post nitridation annealing for lower EOT plasma nitrided gate dielectrics Mar 3, 2004 Abandoned
Array ( [id] => 6944859 [patent_doc_number] => 20050196908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'System and method for forming mold caps over integrated circuit devices' [patent_app_type] => utility [patent_app_number] => 10/791037 [patent_app_country] => US [patent_app_date] => 2004-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3797 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20050196908.pdf [firstpage_image] =>[orig_patent_app_number] => 10791037 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/791037
System and method for forming mold caps over integrated circuit devices Mar 1, 2004 Issued
Array ( [id] => 7185362 [patent_doc_number] => 20050191770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-01 [patent_title] => 'Flip chip semiconductor die internal signal access system and method' [patent_app_type] => utility [patent_app_number] => 10/789637 [patent_app_country] => US [patent_app_date] => 2004-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5217 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20050191770.pdf [firstpage_image] =>[orig_patent_app_number] => 10789637 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/789637
Flip chip semiconductor die internal signal access system and method Feb 26, 2004 Issued
Array ( [id] => 7050823 [patent_doc_number] => 20050186710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-25 [patent_title] => 'Integrated circuit package provided with cooperatively arranged illumination and sensing capabilities' [patent_app_type] => utility [patent_app_number] => 10/784487 [patent_app_country] => US [patent_app_date] => 2004-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3895 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20050186710.pdf [firstpage_image] =>[orig_patent_app_number] => 10784487 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/784487
Integrated circuit package provided with cooperatively arranged illumination and sensing capabilities Feb 22, 2004 Issued
Array ( [id] => 7375571 [patent_doc_number] => 20040219703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Method of making a long wavelength indium gallium arsenide nitride (InGaAsN) active region' [patent_app_type] => new [patent_app_number] => 10/785747 [patent_app_country] => US [patent_app_date] => 2004-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8381 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20040219703.pdf [firstpage_image] =>[orig_patent_app_number] => 10785747 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/785747
Method of making a long wavelength indium gallium arsenide nitride (InGaAsN) active region Feb 22, 2004 Issued
Array ( [id] => 34804 [patent_doc_number] => 07786607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-31 [patent_title] => 'Overlay correction by reducing wafer slipping after alignment' [patent_app_type] => utility [patent_app_number] => 10/780877 [patent_app_country] => US [patent_app_date] => 2004-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3379 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/786/07786607.pdf [firstpage_image] =>[orig_patent_app_number] => 10780877 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/780877
Overlay correction by reducing wafer slipping after alignment Feb 18, 2004 Issued
Array ( [id] => 7222256 [patent_doc_number] => 20040155729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Multi-bit phase shifter and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/774527 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5073 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20040155729.pdf [firstpage_image] =>[orig_patent_app_number] => 10774527 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/774527
Multi-bit phase shifter and manufacturing method thereof Feb 9, 2004 Abandoned
Array ( [id] => 6990992 [patent_doc_number] => 20050090029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-28 [patent_title] => 'Method of manufacturing a display device' [patent_app_type] => utility [patent_app_number] => 10/771277 [patent_app_country] => US [patent_app_date] => 2004-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 19250 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20050090029.pdf [firstpage_image] =>[orig_patent_app_number] => 10771277 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/771277
Method of manufacturing a display device using droplet emitting means Feb 3, 2004 Issued
Array ( [id] => 521181 [patent_doc_number] => 07186571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-06 [patent_title] => 'Method of fabricating a compositionally modulated electrode in a magnetic tunnel junction device' [patent_app_type] => utility [patent_app_number] => 10/769107 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 6573 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/186/07186571.pdf [firstpage_image] =>[orig_patent_app_number] => 10769107 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/769107
Method of fabricating a compositionally modulated electrode in a magnetic tunnel junction device Jan 29, 2004 Issued
Array ( [id] => 432201 [patent_doc_number] => 07264974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-04 [patent_title] => 'Method for fabricating a low resistance TMR read head' [patent_app_type] => utility [patent_app_number] => 10/768917 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2830 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/264/07264974.pdf [firstpage_image] =>[orig_patent_app_number] => 10768917 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/768917
Method for fabricating a low resistance TMR read head Jan 29, 2004 Issued
Array ( [id] => 565360 [patent_doc_number] => 07465645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-16 [patent_title] => 'Method of detaching a layer from a wafer using a localized starting area' [patent_app_type] => utility [patent_app_number] => 10/766207 [patent_app_country] => US [patent_app_date] => 2004-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3741 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/465/07465645.pdf [firstpage_image] =>[orig_patent_app_number] => 10766207 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/766207
Method of detaching a layer from a wafer using a localized starting area Jan 28, 2004 Issued
Array ( [id] => 7442928 [patent_doc_number] => 20040185645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Perovskite-type material forming methods, capacitor dielectric forming methods, and capacitor constructions' [patent_app_type] => new [patent_app_number] => 10/768568 [patent_app_country] => US [patent_app_date] => 2004-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5202 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20040185645.pdf [firstpage_image] =>[orig_patent_app_number] => 10768568 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/768568
Perovskite-type material forming methods, capacitor dielectric forming methods, and capacitor constructions Jan 28, 2004 Issued
Array ( [id] => 7058055 [patent_doc_number] => 20050000414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Method and apparatus for applying conductive ink onto semiconductor substrates' [patent_app_type] => utility [patent_app_number] => 10/764817 [patent_app_country] => US [patent_app_date] => 2004-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13300 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20050000414.pdf [firstpage_image] =>[orig_patent_app_number] => 10764817 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/764817
Method and apparatus for applying conductive ink onto semiconductor substrates Jan 25, 2004 Abandoned
Array ( [id] => 7443186 [patent_doc_number] => 20040185672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'PIN alloy-semiconductor, radiation detectors with rectifying junction contacts, methods and systems for forming PIN alloy-semiconductor devices with rectifying junction contacts, and systems and methods for analyzing alloy-semiconductor properties' [patent_app_type] => new [patent_app_number] => 10/757457 [patent_app_country] => US [patent_app_date] => 2004-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5968 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20040185672.pdf [firstpage_image] =>[orig_patent_app_number] => 10757457 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/757457
Methods for forming pin alloy-semiconductor devices with rectifying junction contacts Jan 14, 2004 Issued
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