Search

Khanh B. Duong

Examiner (ID: 11457)

Most Active Art Unit
2822
Art Unit(s)
2822
Total Applications
696
Issued Applications
594
Pending Applications
7
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8265405 [patent_doc_number] => 20120164832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'METHOD FOR DEPOSITING TUNGSTEN FILM HAVING LOW RESISTIVITY, LOW ROUGHNESS AND HIGH REFLECTIVITY' [patent_app_type] => utility [patent_app_number] => 13/412534 [patent_app_country] => US [patent_app_date] => 2012-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5122 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13412534 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/412534
Method for depositing tungsten film having low resistivity, low roughness and high reflectivity Mar 4, 2012 Issued
Array ( [id] => 8381923 [patent_doc_number] => 20120225546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'METHOD OF MANUFACTURING NONVOLATILE SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/410743 [patent_app_country] => US [patent_app_date] => 2012-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 4997 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13410743 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/410743
METHOD OF MANUFACTURING NONVOLATILE SEMICONDUCTOR STORAGE DEVICE Mar 1, 2012 Abandoned
Array ( [id] => 10010716 [patent_doc_number] => 09054245 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Doping an absorber layer of a photovoltaic device via diffusion from a window layer' [patent_app_type] => utility [patent_app_number] => 13/410516 [patent_app_country] => US [patent_app_date] => 2012-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8863 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13410516 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/410516
Doping an absorber layer of a photovoltaic device via diffusion from a window layer Mar 1, 2012 Issued
Array ( [id] => 8976811 [patent_doc_number] => 20130210241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'Precursors for Plasma Activated Conformal Film Deposition' [patent_app_type] => utility [patent_app_number] => 13/409212 [patent_app_country] => US [patent_app_date] => 2012-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 24647 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13409212 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/409212
Method of plasma activated deposition of a conformal film on a substrate surface Feb 29, 2012 Issued
Array ( [id] => 8652997 [patent_doc_number] => 08372743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Hybrid pitch-split pattern-split lithography process' [patent_app_type] => utility [patent_app_number] => 13/410145 [patent_app_country] => US [patent_app_date] => 2012-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 4227 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13410145 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/410145
Hybrid pitch-split pattern-split lithography process Feb 29, 2012 Issued
Array ( [id] => 9003802 [patent_doc_number] => 20130224927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH NARROW, METAL FILLED OPENINGS' [patent_app_type] => utility [patent_app_number] => 13/408291 [patent_app_country] => US [patent_app_date] => 2012-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13408291 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/408291
Methods for fabricating integrated circuits with narrow, metal filled openings Feb 28, 2012 Issued
Array ( [id] => 8764918 [patent_doc_number] => 20130092955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'LIGHT EMITTING DIODE AND FABRICATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/403734 [patent_app_country] => US [patent_app_date] => 2012-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13403734 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/403734
LIGHT EMITTING DIODE AND FABRICATING METHOD THEREOF Feb 22, 2012 Abandoned
Array ( [id] => 8738194 [patent_doc_number] => 08409964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Shallow trench isolation with improved structure and method of forming' [patent_app_type] => utility [patent_app_number] => 13/399488 [patent_app_country] => US [patent_app_date] => 2012-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 5568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13399488 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/399488
Shallow trench isolation with improved structure and method of forming Feb 16, 2012 Issued
Array ( [id] => 8237390 [patent_doc_number] => 20120146126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'HIGH-K CAPPED BLOCKING DIELECTRIC BANDGAP ENGINEERED SONOS AND MONOS' [patent_app_type] => utility [patent_app_number] => 13/398825 [patent_app_country] => US [patent_app_date] => 2012-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 12128 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13398825 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/398825
High-κ capped blocking dielectric bandgap engineered SONOS and MONOS Feb 15, 2012 Issued
Array ( [id] => 8896616 [patent_doc_number] => 08476137 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-02 [patent_title] => 'Methods of FinFET height control' [patent_app_type] => utility [patent_app_number] => 13/370722 [patent_app_country] => US [patent_app_date] => 2012-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 54 [patent_no_of_words] => 6347 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13370722 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/370722
Methods of FinFET height control Feb 9, 2012 Issued
Array ( [id] => 8555009 [patent_doc_number] => 08329481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Manufacturing method of nitride semiconductor light emitting elements' [patent_app_type] => utility [patent_app_number] => 13/369504 [patent_app_country] => US [patent_app_date] => 2012-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4863 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 312 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13369504 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/369504
Manufacturing method of nitride semiconductor light emitting elements Feb 8, 2012 Issued
Array ( [id] => 8192748 [patent_doc_number] => 20120119214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/357958 [patent_app_country] => US [patent_app_date] => 2012-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 22828 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119214.pdf [firstpage_image] =>[orig_patent_app_number] => 13357958 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/357958
Semiconductor device and manufacturing method thereof Jan 24, 2012 Issued
Array ( [id] => 8165999 [patent_doc_number] => 20120104377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'ORGANIC THIN FILM TRANSISTOR AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/346119 [patent_app_country] => US [patent_app_date] => 2012-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3716 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20120104377.pdf [firstpage_image] =>[orig_patent_app_number] => 13346119 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/346119
Organic thin film transistor Jan 8, 2012 Issued
Array ( [id] => 7787780 [patent_doc_number] => 20120049336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'Semiconductor package for forming a leadframe package' [patent_app_type] => utility [patent_app_number] => 13/289918 [patent_app_country] => US [patent_app_date] => 2011-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7021 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049336.pdf [firstpage_image] =>[orig_patent_app_number] => 13289918 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/289918
Semiconductor package for forming a leadframe package Nov 3, 2011 Issued
Array ( [id] => 8139773 [patent_doc_number] => 20120094434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'ENHANCED SPONTANEOUS SEPARATION METHOD FOR PRODUCTION OF FREE-STANDING NITRIDE THIN FILMS, SUBSTRATES, AND HETEROSTRUCTURES' [patent_app_type] => utility [patent_app_number] => 13/274197 [patent_app_country] => US [patent_app_date] => 2011-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7154 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20120094434.pdf [firstpage_image] =>[orig_patent_app_number] => 13274197 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/274197
ENHANCED SPONTANEOUS SEPARATION METHOD FOR PRODUCTION OF FREE-STANDING NITRIDE THIN FILMS, SUBSTRATES, AND HETEROSTRUCTURES Oct 13, 2011 Abandoned
Array ( [id] => 8549200 [patent_doc_number] => 08324082 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-12-04 [patent_title] => 'Method for fabricating conductive substrates for electronic and optoelectronic devices' [patent_app_type] => utility [patent_app_number] => 13/233070 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 34 [patent_no_of_words] => 5204 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13233070 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/233070
Method for fabricating conductive substrates for electronic and optoelectronic devices Sep 14, 2011 Issued
Array ( [id] => 7815149 [patent_doc_number] => 20120061769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD FOR MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 13/225548 [patent_app_country] => US [patent_app_date] => 2011-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14262 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20120061769.pdf [firstpage_image] =>[orig_patent_app_number] => 13225548 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/225548
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD FOR MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Sep 4, 2011 Abandoned
Array ( [id] => 8261823 [patent_doc_number] => 20120161250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'Transistor Comprising High-K Metal Gate Electrode Structures Including a Polycrystalline Semiconductor Material and Embedded Strain-Inducing Semiconductor Alloys' [patent_app_type] => utility [patent_app_number] => 13/198209 [patent_app_country] => US [patent_app_date] => 2011-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7495 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13198209 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/198209
Method for forming a transistor comprising high-k metal gate electrode structures including a polycrystalline semiconductor material and embedded strain-inducing semiconductor alloys Aug 3, 2011 Issued
Array ( [id] => 7572247 [patent_doc_number] => 20110267903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING DRAM CELL MODE AND NON-VOLATILE MEMORY CELL MODE AND OPERATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/182995 [patent_app_country] => US [patent_app_date] => 2011-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4856 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20110267903.pdf [firstpage_image] =>[orig_patent_app_number] => 13182995 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/182995
SEMICONDUCTOR MEMORY DEVICE HAVING DRAM CELL MODE AND NON-VOLATILE MEMORY CELL MODE AND OPERATION METHOD THEREOF Jul 13, 2011 Abandoned
Array ( [id] => 7572134 [patent_doc_number] => 20110267790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/180003 [patent_app_country] => US [patent_app_date] => 2011-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 29179 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20110267790.pdf [firstpage_image] =>[orig_patent_app_number] => 13180003 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/180003
Semiconductor device and manufacturing method thereof Jul 10, 2011 Issued
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