Search

Khanh Dang

Examiner (ID: 144, Phone: (571)272-3626 , Office: P/2185 )

Most Active Art Unit
2837
Art Unit(s)
2111, 2181, 2101, 2112, 2837, 2108, 2185
Total Applications
2460
Issued Applications
1978
Pending Applications
112
Abandoned Applications
373

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5976226 [patent_doc_number] => 20110153901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'VIRTUAL USB KEY FOR BLADE SERVER' [patent_app_type] => utility [patent_app_number] => 12/821981 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20110153901.pdf [firstpage_image] =>[orig_patent_app_number] => 12821981 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/821981
VIRTUAL USB KEY FOR BLADE SERVER Jun 22, 2010 Abandoned
Array ( [id] => 9871585 [patent_doc_number] => 08959376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-17 [patent_title] => 'Sharing power between two or more power sharing servers' [patent_app_type] => utility [patent_app_number] => 12/821802 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3748 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821802 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/821802
Sharing power between two or more power sharing servers Jun 22, 2010 Issued
Array ( [id] => 7569187 [patent_doc_number] => 20110289250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'CARD ADAPTER' [patent_app_type] => utility [patent_app_number] => 12/819411 [patent_app_country] => US [patent_app_date] => 2010-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1238 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20110289250.pdf [firstpage_image] =>[orig_patent_app_number] => 12819411 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/819411
CARD ADAPTER Jun 20, 2010 Abandoned
Array ( [id] => 6593007 [patent_doc_number] => 20100274946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'INTEGRATED CIRCUIT AND INFORMATION PROCESSING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/813966 [patent_app_country] => US [patent_app_date] => 2010-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6739 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20100274946.pdf [firstpage_image] =>[orig_patent_app_number] => 12813966 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/813966
INTEGRATED CIRCUIT AND INFORMATION PROCESSING DEVICE Jun 10, 2010 Abandoned
Array ( [id] => 7582191 [patent_doc_number] => 20110296074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'MEMORY MAPPED INPUT/OUTPUT BUS ADDRESS RANGE TRANSLATION FOR VIRTUAL BRIDGES' [patent_app_type] => utility [patent_app_number] => 12/787799 [patent_app_country] => US [patent_app_date] => 2010-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 13785 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20110296074.pdf [firstpage_image] =>[orig_patent_app_number] => 12787799 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/787799
Memory mapped input/output bus address range translation for virtual bridges May 25, 2010 Issued
Array ( [id] => 7569184 [patent_doc_number] => 20110289247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'Autonomous positional addressing in stacked multi-board systems' [patent_app_type] => utility [patent_app_number] => 12/800751 [patent_app_country] => US [patent_app_date] => 2010-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6191 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20110289247.pdf [firstpage_image] =>[orig_patent_app_number] => 12800751 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/800751
Autonomous positional addressing in stacked multi-board systems May 20, 2010 Abandoned
Array ( [id] => 8655463 [patent_doc_number] => 08375230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Managing heat dissipation while testing a power device' [patent_app_type] => utility [patent_app_number] => 12/783602 [patent_app_country] => US [patent_app_date] => 2010-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3125 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12783602 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/783602
Managing heat dissipation while testing a power device May 19, 2010 Issued
Array ( [id] => 8407771 [patent_doc_number] => 20120239840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-20 [patent_title] => 'BUS CONTROL FOR A DOMESTIC APPLIANCE' [patent_app_type] => utility [patent_app_number] => 13/321370 [patent_app_country] => US [patent_app_date] => 2010-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11998 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13321370 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/321370
Bus control for a domestic appliance May 18, 2010 Issued
Array ( [id] => 6272455 [patent_doc_number] => 20100299469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-25 [patent_title] => 'ACCESS CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/773082 [patent_app_country] => US [patent_app_date] => 2010-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3388 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0299/20100299469.pdf [firstpage_image] =>[orig_patent_app_number] => 12773082 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/773082
ACCESS CONTROL CIRCUIT May 3, 2010 Abandoned
Array ( [id] => 6125158 [patent_doc_number] => 20110078350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'METHOD FOR GENERATING MULTIPLE SERIAL BUS CHIP SELECTS USING SINGLE CHIP SELECT SIGNAL AND MODULATION OF CLOCK SIGNAL FREQUENCY' [patent_app_type] => utility [patent_app_number] => 12/770398 [patent_app_country] => US [patent_app_date] => 2010-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3550 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20110078350.pdf [firstpage_image] =>[orig_patent_app_number] => 12770398 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/770398
METHOD FOR GENERATING MULTIPLE SERIAL BUS CHIP SELECTS USING SINGLE CHIP SELECT SIGNAL AND MODULATION OF CLOCK SIGNAL FREQUENCY Apr 28, 2010 Abandoned
Array ( [id] => 7809012 [patent_doc_number] => 20120059966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-08 [patent_title] => 'STORAGE DEVICE AND METHOD FOR MANAGING SIZE OF STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/741788 [patent_app_country] => US [patent_app_date] => 2010-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 21028 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20120059966.pdf [firstpage_image] =>[orig_patent_app_number] => 12741788 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/741788
Storage device and method for managing size of storage device Apr 22, 2010 Issued
Array ( [id] => 10177907 [patent_doc_number] => 09208112 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-12-08 [patent_title] => 'Permanent allocation of a large host memory' [patent_app_type] => utility [patent_app_number] => 12/765072 [patent_app_country] => US [patent_app_date] => 2010-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7013 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12765072 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/765072
Permanent allocation of a large host memory Apr 21, 2010 Issued
Array ( [id] => 6548565 [patent_doc_number] => 20100271794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'HARDWARE MODULE AND BACKPLANE BOARD FOR AN IED' [patent_app_type] => utility [patent_app_number] => 12/765166 [patent_app_country] => US [patent_app_date] => 2010-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3040 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0271/20100271794.pdf [firstpage_image] =>[orig_patent_app_number] => 12765166 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/765166
HARDWARE MODULE AND BACKPLANE BOARD FOR AN IED Apr 21, 2010 Abandoned
Array ( [id] => 9242179 [patent_doc_number] => 08606984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Hierarchical to physical bus translation' [patent_app_type] => utility [patent_app_number] => 12/758213 [patent_app_country] => US [patent_app_date] => 2010-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8515 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12758213 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/758213
Hierarchical to physical bus translation Apr 11, 2010 Issued
Array ( [id] => 9169834 [patent_doc_number] => 08595527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Method of managing power of multi-core processor, recording medium storing program for performing the same, and multi-core processor system' [patent_app_type] => utility [patent_app_number] => 12/756715 [patent_app_country] => US [patent_app_date] => 2010-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5356 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12756715 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/756715
Method of managing power of multi-core processor, recording medium storing program for performing the same, and multi-core processor system Apr 7, 2010 Issued
Array ( [id] => 7741304 [patent_doc_number] => 20120020401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'COMMUNICATION ADDRESS DETECTION APPARATUS, CONNECTOR WITH BUILT-IN CONTROL CIRCUIT, AND COMMUNICATION ADDRESS DETECTION METHOD' [patent_app_type] => utility [patent_app_number] => 13/258509 [patent_app_country] => US [patent_app_date] => 2010-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8869 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20120020401.pdf [firstpage_image] =>[orig_patent_app_number] => 13258509 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/258509
Communication address detection apparatus, connector with built-in control circuit, and communication address detection method Mar 25, 2010 Issued
Array ( [id] => 9314846 [patent_doc_number] => 08656081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'System and method for coordinating control of an output device by multiple control consoles' [patent_app_type] => utility [patent_app_number] => 12/723158 [patent_app_country] => US [patent_app_date] => 2010-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 16471 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12723158 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/723158
System and method for coordinating control of an output device by multiple control consoles Mar 11, 2010 Issued
Array ( [id] => 9348044 [patent_doc_number] => 08667206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Interface device for coordinating control of an output device by multiple control consoles' [patent_app_type] => utility [patent_app_number] => 12/723140 [patent_app_country] => US [patent_app_date] => 2010-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 16467 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 545 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12723140 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/723140
Interface device for coordinating control of an output device by multiple control consoles Mar 11, 2010 Issued
Array ( [id] => 7542828 [patent_doc_number] => 08060677 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-15 [patent_title] => 'Real-time industrial ethernet ethercat communication control' [patent_app_type] => utility [patent_app_number] => 12/704023 [patent_app_country] => US [patent_app_date] => 2010-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1757 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/060/08060677.pdf [firstpage_image] =>[orig_patent_app_number] => 12704023 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/704023
Real-time industrial ethernet ethercat communication control Feb 10, 2010 Issued
Array ( [id] => 8899384 [patent_doc_number] => 08478918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-02 [patent_title] => 'Communication interface circuit, electronic device, and communication method' [patent_app_type] => utility [patent_app_number] => 12/700258 [patent_app_country] => US [patent_app_date] => 2010-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7744 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12700258 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/700258
Communication interface circuit, electronic device, and communication method Feb 3, 2010 Issued
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