Search

Khareem E. Almo

Examiner (ID: 17294, Phone: (571)272-5524 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2849, 2842, 2816, 2836
Total Applications
1067
Issued Applications
905
Pending Applications
63
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17166806 [patent_doc_number] => 11152920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Voltage starved passgate with IR drop [patent_app_type] => utility [patent_app_number] => 16/578622 [patent_app_country] => US [patent_app_date] => 2019-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5487 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16578622 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/578622
Voltage starved passgate with IR drop Sep 22, 2019 Issued
Array ( [id] => 16503061 [patent_doc_number] => 10868467 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-15 [patent_title] => Pump circuit, pump device, and operation method of pump circuit [patent_app_type] => utility [patent_app_number] => 16/578388 [patent_app_country] => US [patent_app_date] => 2019-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2703 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16578388 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/578388
Pump circuit, pump device, and operation method of pump circuit Sep 21, 2019 Issued
Array ( [id] => 16724631 [patent_doc_number] => 20210091778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => Switched Capacitor Slew Boost Technique [patent_app_type] => utility [patent_app_number] => 16/575874 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575874 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/575874
Switched Capacitor Slew Boost Technique Sep 18, 2019 Issued
Array ( [id] => 15351089 [patent_doc_number] => 20200013436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/574989 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16574989 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/574989
Semiconductor integrated circuit Sep 17, 2019 Issued
Array ( [id] => 16395177 [patent_doc_number] => 20200336118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => DYNAMIC BIASING CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/574231 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2346 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16574231 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/574231
Dynamic biasing circuit Sep 17, 2019 Issued
Array ( [id] => 15351641 [patent_doc_number] => 20200013712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => FABRICATING UNIQUE CHIPS USING A CHARGED PARTICLE MULTI-BEAMLET LITHOGRAPHY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/572592 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12934 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572592 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572592
Fabricating unique chips using a charged particle multi-beamlet lithography system Sep 15, 2019 Issued
Array ( [id] => 16418493 [patent_doc_number] => 10826403 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-03 [patent_title] => Active Y-rated capacitor control options for common-mode electromagnetic interference (EMI) reduction [patent_app_type] => utility [patent_app_number] => 16/566240 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 7599 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16566240 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/566240
Active Y-rated capacitor control options for common-mode electromagnetic interference (EMI) reduction Sep 9, 2019 Issued
Array ( [id] => 16387111 [patent_doc_number] => 10811961 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-20 [patent_title] => Top-off charge pump and methods of operating same [patent_app_type] => utility [patent_app_number] => 16/564287 [patent_app_country] => US [patent_app_date] => 2019-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16564287 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/564287
Top-off charge pump and methods of operating same Sep 8, 2019 Issued
Array ( [id] => 17417817 [patent_doc_number] => 20220052721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => Broadcast Receiving Device of a Motor Vehicle [patent_app_type] => utility [patent_app_number] => 17/276755 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2320 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17276755 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/276755
Broadcast Receiving Device of a Motor Vehicle Aug 29, 2019 Abandoned
Array ( [id] => 15771495 [patent_doc_number] => 20200116765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => COMPARATOR AND RECEIVER INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/555833 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16555833 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/555833
Comparator and receiver including the same Aug 28, 2019 Issued
Array ( [id] => 16675224 [patent_doc_number] => 20210063988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => High Current and Power Limiting Circuit for I/O Modules with Internal Output Power Support [patent_app_type] => utility [patent_app_number] => 16/550867 [patent_app_country] => US [patent_app_date] => 2019-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550867 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550867
High current and power limiting circuit for I/O modules with internal output power support Aug 25, 2019 Issued
Array ( [id] => 16173533 [patent_doc_number] => 10715117 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-14 [patent_title] => Comparator hysteresis circuit [patent_app_type] => utility [patent_app_number] => 16/544990 [patent_app_country] => US [patent_app_date] => 2019-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3080 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544990 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/544990
Comparator hysteresis circuit Aug 19, 2019 Issued
Array ( [id] => 15981571 [patent_doc_number] => 10671112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Gate driving circuit and display apparatus having the same [patent_app_type] => utility [patent_app_number] => 16/541904 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16541904 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/541904
Gate driving circuit and display apparatus having the same Aug 14, 2019 Issued
Array ( [id] => 15186233 [patent_doc_number] => 20190363708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => DRIVING DEVICE OF SEMICONDUCTOR SWITCH [patent_app_type] => utility [patent_app_number] => 16/534416 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7979 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16534416 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/534416
Driving device of semiconductor switch Aug 6, 2019 Issued
Array ( [id] => 16069021 [patent_doc_number] => 10693478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Clock generation system and method having time and frequency division activation mechanism [patent_app_type] => utility [patent_app_number] => 16/526066 [patent_app_country] => US [patent_app_date] => 2019-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3375 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16526066 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/526066
Clock generation system and method having time and frequency division activation mechanism Jul 29, 2019 Issued
Array ( [id] => 15124677 [patent_doc_number] => 20190348972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => FLIP-FLOP INCLUDING 3-STATE INVERTER [patent_app_type] => utility [patent_app_number] => 16/522835 [patent_app_country] => US [patent_app_date] => 2019-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16522835 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/522835
Flip-flop including 3-state inverter Jul 25, 2019 Issued
Array ( [id] => 16200336 [patent_doc_number] => 10725495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Power gating system [patent_app_type] => utility [patent_app_number] => 16/507516 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5204 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507516 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507516
Power gating system Jul 9, 2019 Issued
Array ( [id] => 15548691 [patent_doc_number] => 10574140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Charge balanced charge pump control [patent_app_type] => utility [patent_app_number] => 16/506252 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 29 [patent_no_of_words] => 6216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506252 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506252
Charge balanced charge pump control Jul 8, 2019 Issued
Array ( [id] => 17233039 [patent_doc_number] => 20210359596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => METHOD FOR REDUCING ELECTROMAGNETIC DISTURBANCES GENERATED DURING THE SWITCHING OF A TRANSISTOR INTO THE CONDUCTING STATE [patent_app_type] => utility [patent_app_number] => 17/257444 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17257444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/257444
Method for reducing electromagnetic disturbances generated during the switching of a transistor into the conducting state Jul 8, 2019 Issued
Array ( [id] => 15918857 [patent_doc_number] => 10656666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Bias output apparatus including a plurality of voltage output circuits, and image forming apparatus [patent_app_type] => utility [patent_app_number] => 16/505218 [patent_app_country] => US [patent_app_date] => 2019-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7344 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16505218 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/505218
Bias output apparatus including a plurality of voltage output circuits, and image forming apparatus Jul 7, 2019 Issued
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