
Khareem E. Almo
Examiner (ID: 17294, Phone: (571)272-5524 , Office: P/2842 )
| Most Active Art Unit | 2842 |
| Art Unit(s) | 2849, 2842, 2816, 2836 |
| Total Applications | 1067 |
| Issued Applications | 905 |
| Pending Applications | 63 |
| Abandoned Applications | 110 |
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|---|---|---|---|
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