
Khareem E. Almo
Examiner (ID: 13774, Phone: (571)272-5524 , Office: P/2842 )
| Most Active Art Unit | 2842 |
| Art Unit(s) | 2849, 2836, 2816, 2842 |
| Total Applications | 1065 |
| Issued Applications | 903 |
| Pending Applications | 64 |
| Abandoned Applications | 109 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10403339
[patent_doc_number] => 20150288349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-08
[patent_title] => 'SWITCH DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/244336
[patent_app_country] => US
[patent_app_date] => 2014-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5531
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14244336
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/244336 | Switch device | Apr 2, 2014 | Issued |
Array
(
[id] => 11510437
[patent_doc_number] => 09601607
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-03-21
[patent_title] => 'Dual mode transistor'
[patent_app_type] => utility
[patent_app_number] => 14/225836
[patent_app_country] => US
[patent_app_date] => 2014-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 19242
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14225836
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/225836 | Dual mode transistor | Mar 25, 2014 | Issued |
Array
(
[id] => 11000657
[patent_doc_number] => 20160197604
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-07
[patent_title] => 'SEMICONDUCTOR SWITCH CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 14/785783
[patent_app_country] => US
[patent_app_date] => 2014-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7084
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14785783
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/785783 | Semiconductor switch circuit | Mar 25, 2014 | Issued |
Array
(
[id] => 10194421
[patent_doc_number] => 09223330
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-29
[patent_title] => 'Internal voltage generation circuit'
[patent_app_type] => utility
[patent_app_number] => 14/225025
[patent_app_country] => US
[patent_app_date] => 2014-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 4289
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14225025
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/225025 | Internal voltage generation circuit | Mar 24, 2014 | Issued |
Array
(
[id] => 10958803
[patent_doc_number] => 20140361828
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-11
[patent_title] => 'DIGITAL POWER GATING WITH PROGRAMMABLE CONTROL PARAMETER'
[patent_app_type] => utility
[patent_app_number] => 14/202313
[patent_app_country] => US
[patent_app_date] => 2014-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 25485
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14202313
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/202313 | Digital power gating with programmable control parameter | Mar 9, 2014 | Issued |
Array
(
[id] => 11770993
[patent_doc_number] => 09379710
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-06-28
[patent_title] => 'Level conversion circuit and method'
[patent_app_type] => utility
[patent_app_number] => 14/192056
[patent_app_country] => US
[patent_app_date] => 2014-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 8211
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14192056
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/192056 | Level conversion circuit and method | Feb 26, 2014 | Issued |
Array
(
[id] => 10604739
[patent_doc_number] => 09325313
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-26
[patent_title] => 'Low-power level-shift circuit for data-dependent signals'
[patent_app_type] => utility
[patent_app_number] => 14/185853
[patent_app_country] => US
[patent_app_date] => 2014-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4418
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14185853
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/185853 | Low-power level-shift circuit for data-dependent signals | Feb 19, 2014 | Issued |
Array
(
[id] => 10344290
[patent_doc_number] => 20150229295
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-08-13
[patent_title] => 'THREE-D POWER CONVERTER IN THREE DISTINCT STRATA'
[patent_app_type] => utility
[patent_app_number] => 14/178791
[patent_app_country] => US
[patent_app_date] => 2014-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3837
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14178791
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/178791 | Three-D power converter in three distinct strata | Feb 11, 2014 | Issued |
Array
(
[id] => 9711829
[patent_doc_number] => 08836406
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-16
[patent_title] => 'Voltage level shifter'
[patent_app_type] => utility
[patent_app_number] => 14/176136
[patent_app_country] => US
[patent_app_date] => 2014-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 6010
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 240
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14176136
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/176136 | Voltage level shifter | Feb 8, 2014 | Issued |
Array
(
[id] => 10597937
[patent_doc_number] => 09319037
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-19
[patent_title] => 'Self-adjusting clock doubler and integrated circuit clock distribution system using same'
[patent_app_type] => utility
[patent_app_number] => 14/171469
[patent_app_country] => US
[patent_app_date] => 2014-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 5186
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14171469
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/171469 | Self-adjusting clock doubler and integrated circuit clock distribution system using same | Feb 2, 2014 | Issued |
Array
(
[id] => 10217864
[patent_doc_number] => 20150102857
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-16
[patent_title] => 'VOLTAGE GENERATOR, INTEGRATED CIRCUIT, AND VOLTAGE GENERATING METHOD'
[patent_app_type] => utility
[patent_app_number] => 14/166947
[patent_app_country] => US
[patent_app_date] => 2014-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4512
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14166947
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/166947 | Voltage generator, integrated circuit, and voltage generating method | Jan 28, 2014 | Issued |
Array
(
[id] => 10322399
[patent_doc_number] => 20150207403
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-23
[patent_title] => 'CHARGE PUMP STAGE AND A CHARGE PUMP'
[patent_app_type] => utility
[patent_app_number] => 14/160225
[patent_app_country] => US
[patent_app_date] => 2014-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3715
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14160225
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/160225 | Charge pump stage and a charge pump | Jan 20, 2014 | Issued |
Array
(
[id] => 10322493
[patent_doc_number] => 20150207497
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-23
[patent_title] => 'LOW-OFFSET BANDGAP CIRCUIT AND OFFSET-CANCELLING CIRCUIT THEREIN'
[patent_app_type] => utility
[patent_app_number] => 14/159191
[patent_app_country] => US
[patent_app_date] => 2014-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4191
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14159191
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/159191 | Low-offset bandgap circuit and offset-cancelling circuit therein | Jan 19, 2014 | Issued |
Array
(
[id] => 10245534
[patent_doc_number] => 20150130529
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-14
[patent_title] => 'THREE-MODE HIGH-SPEED LEVEL UP SHIFTER CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 14/156857
[patent_app_country] => US
[patent_app_date] => 2014-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3067
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14156857
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/156857 | Three-mode high-speed level up shifter circuit | Jan 15, 2014 | Issued |
Array
(
[id] => 10845388
[patent_doc_number] => 08872572
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-28
[patent_title] => 'Semiconductor device and electronic appliance'
[patent_app_type] => utility
[patent_app_number] => 14/147647
[patent_app_country] => US
[patent_app_date] => 2014-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 62
[patent_no_of_words] => 22790
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14147647
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/147647 | Semiconductor device and electronic appliance | Jan 5, 2014 | Issued |
Array
(
[id] => 9558507
[patent_doc_number] => 20140176219
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-26
[patent_title] => 'POWER CIRCUIT AND WIRELESS NETWORK ADAPTER'
[patent_app_type] => utility
[patent_app_number] => 14/144302
[patent_app_country] => US
[patent_app_date] => 2013-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8669
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14144302
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/144302 | Power circuit and wireless network adapter | Dec 29, 2013 | Issued |
Array
(
[id] => 10464377
[patent_doc_number] => 20150349393
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-03
[patent_title] => 'MANAGEMENT OF HIGH-TEMPERATURE BATTERIES'
[patent_app_type] => utility
[patent_app_number] => 14/653538
[patent_app_country] => US
[patent_app_date] => 2013-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3603
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14653538
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/653538 | MANAGEMENT OF HIGH-TEMPERATURE BATTERIES | Dec 19, 2013 | Abandoned |
Array
(
[id] => 10286861
[patent_doc_number] => 20150171859
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-18
[patent_title] => 'Method and Apparatus for Controlling Current Slew Rate of a Switching Current Through an External Resistive Load'
[patent_app_type] => utility
[patent_app_number] => 14/132970
[patent_app_country] => US
[patent_app_date] => 2013-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4507
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14132970
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/132970 | Method and apparatus for controlling current slew rate of a switching current through an external resistive load | Dec 17, 2013 | Issued |
Array
(
[id] => 9996842
[patent_doc_number] => 09041444
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-05-26
[patent_title] => 'Time-to-digital convertor-assisted phase-locked loop spur mitigation'
[patent_app_type] => utility
[patent_app_number] => 14/109498
[patent_app_country] => US
[patent_app_date] => 2013-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9219
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14109498
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/109498 | Time-to-digital convertor-assisted phase-locked loop spur mitigation | Dec 16, 2013 | Issued |
Array
(
[id] => 10029325
[patent_doc_number] => 09071242
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-30
[patent_title] => 'Level shifters, methods for making the level shifters and methods of using integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 14/107115
[patent_app_country] => US
[patent_app_date] => 2013-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4105
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14107115
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/107115 | Level shifters, methods for making the level shifters and methods of using integrated circuits | Dec 15, 2013 | Issued |