Search

Khareem E. Almo

Examiner (ID: 17294, Phone: (571)272-5524 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2849, 2842, 2816, 2836
Total Applications
1067
Issued Applications
905
Pending Applications
63
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9996842 [patent_doc_number] => 09041444 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-05-26 [patent_title] => 'Time-to-digital convertor-assisted phase-locked loop spur mitigation' [patent_app_type] => utility [patent_app_number] => 14/109498 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9219 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14109498 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/109498
Time-to-digital convertor-assisted phase-locked loop spur mitigation Dec 16, 2013 Issued
Array ( [id] => 10029325 [patent_doc_number] => 09071242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'Level shifters, methods for making the level shifters and methods of using integrated circuits' [patent_app_type] => utility [patent_app_number] => 14/107115 [patent_app_country] => US [patent_app_date] => 2013-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4105 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14107115 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/107115
Level shifters, methods for making the level shifters and methods of using integrated circuits Dec 15, 2013 Issued
Array ( [id] => 9543178 [patent_doc_number] => 20140167825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'MULTI-FREQUENCY CLOCK SKEW CONTROL FOR INTER-CHIP COMMUNICATION IN SYNCHRONOUS DIGITAL SYSTEMS' [patent_app_type] => utility [patent_app_number] => 14/106269 [patent_app_country] => US [patent_app_date] => 2013-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15879 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14106269 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/106269
Multi-frequency clock skew control for inter-chip communication in synchronous digital systems Dec 12, 2013 Issued
Array ( [id] => 11702471 [patent_doc_number] => 09692408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-27 [patent_title] => 'Devices and systems comprising drivers for power conversion circuits' [patent_app_type] => utility [patent_app_number] => 14/654127 [patent_app_country] => US [patent_app_date] => 2013-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9034 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14654127 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/654127
Devices and systems comprising drivers for power conversion circuits Dec 11, 2013 Issued
Array ( [id] => 9566566 [patent_doc_number] => 20140184279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'DRIVE CIRCUIT AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/104490 [patent_app_country] => US [patent_app_date] => 2013-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5839 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14104490 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/104490
Drive circuit and semiconductor device Dec 11, 2013 Issued
Array ( [id] => 10944093 [patent_doc_number] => 20140347115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'VOLTAGE LEVEL TRANSLATOR' [patent_app_type] => utility [patent_app_number] => 14/103749 [patent_app_country] => US [patent_app_date] => 2013-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5709 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14103749 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/103749
Voltage level translator Dec 10, 2013 Issued
Array ( [id] => 9535136 [patent_doc_number] => 20140159782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'Divide-By-Three Injection-Locked Frequency Divider' [patent_app_type] => utility [patent_app_number] => 14/100322 [patent_app_country] => US [patent_app_date] => 2013-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2686 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14100322 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/100322
Divide-By-Three Injection-Locked Frequency Divider Dec 8, 2013 Abandoned
Array ( [id] => 10080460 [patent_doc_number] => 09118320 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-25 [patent_title] => 'Input buffer with current control mechanism' [patent_app_type] => utility [patent_app_number] => 14/094809 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1676 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14094809 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/094809
Input buffer with current control mechanism Dec 2, 2013 Issued
Array ( [id] => 9543175 [patent_doc_number] => 20140167822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'CASCODE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/094890 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3260 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14094890 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/094890
Cascode circuit Dec 2, 2013 Issued
Array ( [id] => 9535131 [patent_doc_number] => 20140159777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'VOLTAGE DETECTOR AND SEMICONDUCTOR DEVICE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/093352 [patent_app_country] => US [patent_app_date] => 2013-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2833 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14093352 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/093352
VOLTAGE DETECTOR AND SEMICONDUCTOR DEVICE INCLUDING THE SAME Nov 28, 2013 Abandoned
Array ( [id] => 9883488 [patent_doc_number] => 08970260 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-03 [patent_title] => 'Output drivers' [patent_app_type] => utility [patent_app_number] => 14/086119 [patent_app_country] => US [patent_app_date] => 2013-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5062 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14086119 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/086119
Output drivers Nov 20, 2013 Issued
Array ( [id] => 10119221 [patent_doc_number] => 09154116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-06 [patent_title] => 'Input circuit with mirroring' [patent_app_type] => utility [patent_app_number] => 14/086150 [patent_app_country] => US [patent_app_date] => 2013-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5702 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14086150 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/086150
Input circuit with mirroring Nov 20, 2013 Issued
Array ( [id] => 9797019 [patent_doc_number] => 20150008963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-08 [patent_title] => 'OUTPUT APPARATUS AND OUTPUT SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/083958 [patent_app_country] => US [patent_app_date] => 2013-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4602 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14083958 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/083958
Output apparatus and output system including the same Nov 18, 2013 Issued
Array ( [id] => 9862377 [patent_doc_number] => 20150042394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-12 [patent_title] => 'BUFFER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/082850 [patent_app_country] => US [patent_app_date] => 2013-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2932 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14082850 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/082850
Buffer circuit Nov 17, 2013 Issued
Array ( [id] => 11071040 [patent_doc_number] => 20160268004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'SHIFT REGISTER UNIT AND GATE DRIVING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/375049 [patent_app_country] => US [patent_app_date] => 2013-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4708 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14375049 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/375049
Shift register unit and gate driving circuit Nov 10, 2013 Issued
Array ( [id] => 11091775 [patent_doc_number] => 20160288743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'Device for supply of electrical power in a vehicle' [patent_app_type] => utility [patent_app_number] => 14/442589 [patent_app_country] => US [patent_app_date] => 2013-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1650 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14442589 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/442589
Device for supply of electrical power in a vehicle Nov 10, 2013 Abandoned
Array ( [id] => 11926312 [patent_doc_number] => 09793907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Resonator, phase-locked loop, and semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 14/901914 [patent_app_country] => US [patent_app_date] => 2013-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6208 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14901914 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/901914
Resonator, phase-locked loop, and semiconductor integrated circuit device Nov 6, 2013 Issued
Array ( [id] => 9632422 [patent_doc_number] => 20140210530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'CLOCK RECOVERY CIRCUIT AND CLOCK AND DATA RECOVERY CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/072317 [patent_app_country] => US [patent_app_date] => 2013-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4803 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072317 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/072317
Clock recovery circuit and clock and data recovery circuit Nov 4, 2013 Issued
Array ( [id] => 10851890 [patent_doc_number] => 08878578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-04 [patent_title] => 'Jitter monitor' [patent_app_type] => utility [patent_app_number] => 14/068661 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 7027 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14068661 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/068661
Jitter monitor Oct 30, 2013 Issued
Array ( [id] => 10067346 [patent_doc_number] => 09106212 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-11 [patent_title] => 'Method and apparatus for interfacing integrated circuits (ICs) that operate at different supply voltages' [patent_app_type] => utility [patent_app_number] => 14/068359 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3868 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14068359 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/068359
Method and apparatus for interfacing integrated circuits (ICs) that operate at different supply voltages Oct 30, 2013 Issued
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