Khareem E. Almo

Array ( [id] => 6576432 [patent_doc_number] => 20100321084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'Level shift circuit' [patent_app_type] => utility [patent_app_number] => 12/801246 [patent_app_country] => US [patent_app_date] => 2010-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8642 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0321/20100321084.pdf [firstpage_image] =>[orig_patent_app_number] => 12801246 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7551355 [patent_doc_number] => 08063690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-22 [patent_title] => 'Level shift circuit' [patent_app_type] => utility [patent_app_number] => 12/786761 [patent_app_country] => US [patent_app_date] => 2010-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2746 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/063/08063690.pdf [firstpage_image] =>[orig_patent_app_number] => 12786761 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6619185 [patent_doc_number] => 20100225370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-09 [patent_title] => 'Frequency-Doubling Delay Locked Loop' [patent_app_type] => utility [patent_app_number] => 12/784157 [patent_app_country] => US [patent_app_date] => 2010-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5245 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20100225370.pdf [firstpage_image] =>[orig_patent_app_number] => 12784157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8773885 [patent_doc_number] => 08427852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'Signal transmission arrangement with a transformer' [patent_app_type] => utility [patent_app_number] => 12/772744 [patent_app_country] => US [patent_app_date] => 2010-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 8331 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12772744 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6484128 [patent_doc_number] => 20100208542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'CLOCK DIVIDER AND CLOCK DIVIDING METHOD FOR A DLL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/771545 [patent_app_country] => US [patent_app_date] => 2010-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3032 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20100208542.pdf [firstpage_image] =>[orig_patent_app_number] => 12771545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6043307 [patent_doc_number] => 20110204953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'LEVEL SHIFTER CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/756772 [patent_app_country] => US [patent_app_date] => 2010-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4133 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20110204953.pdf [firstpage_image] =>[orig_patent_app_number] => 12756772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8283592 [patent_doc_number] => 08217702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-10 [patent_title] => 'Circuitry for processing signals from a higher voltage domain using devices designed to operate in a lower voltage domain' [patent_app_type] => utility [patent_app_number] => 12/662197 [patent_app_country] => US [patent_app_date] => 2010-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6164 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12662197 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9966702 [patent_doc_number] => 09014326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'Flip-flop, shift register, display drive circuit, display apparatus, and display panel' [patent_app_type] => utility [patent_app_number] => 13/378214 [patent_app_country] => US [patent_app_date] => 2010-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 74 [patent_figures_cnt] => 75 [patent_no_of_words] => 42431 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13378214 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9216900 [patent_doc_number] => 08629704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-14 [patent_title] => 'Level shifters, integrated circuits, systems, and methods for operating the level shifters' [patent_app_type] => utility [patent_app_number] => 12/717705 [patent_app_country] => US [patent_app_date] => 2010-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3727 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12717705 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6084774 [patent_doc_number] => 20110215847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'Frequency synthesizer' [patent_app_type] => utility [patent_app_number] => 12/659299 [patent_app_country] => US [patent_app_date] => 2010-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1817 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20110215847.pdf [firstpage_image] =>[orig_patent_app_number] => 12659299 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6512215 [patent_doc_number] => 20100219867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'Delay-locked loop and electronic device including the same' [patent_app_type] => utility [patent_app_number] => 12/659010 [patent_app_country] => US [patent_app_date] => 2010-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7309 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20100219867.pdf [firstpage_image] =>[orig_patent_app_number] => 12659010 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7713930 [patent_doc_number] => 08093939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-10 [patent_title] => 'Level shift circuit and switching circuit including the same' [patent_app_type] => utility [patent_app_number] => 12/708815 [patent_app_country] => US [patent_app_date] => 2010-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7743 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/093/08093939.pdf [firstpage_image] =>[orig_patent_app_number] => 12708815 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8153542 [patent_doc_number] => 08169250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-01 [patent_title] => 'Signal level conversion circuit' [patent_app_type] => utility [patent_app_number] => 12/703928 [patent_app_country] => US [patent_app_date] => 2010-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6569 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 345 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/169/08169250.pdf [firstpage_image] =>[orig_patent_app_number] => 12703928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6499439 [patent_doc_number] => 20100201413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'Clock control circuit and semiconductor device including the same' [patent_app_type] => utility [patent_app_number] => 12/656601 [patent_app_country] => US [patent_app_date] => 2010-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6991 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20100201413.pdf [firstpage_image] =>[orig_patent_app_number] => 12656601 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4645141 [patent_doc_number] => 08022750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Boost circuit' [patent_app_type] => utility [patent_app_number] => 12/700192 [patent_app_country] => US [patent_app_date] => 2010-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 44 [patent_no_of_words] => 9649 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/022/08022750.pdf [firstpage_image] =>[orig_patent_app_number] => 12700192 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5956608 [patent_doc_number] => 20110181338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'Dual path level shifter' [patent_app_type] => utility [patent_app_number] => 12/657857 [patent_app_country] => US [patent_app_date] => 2010-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6181 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20110181338.pdf [firstpage_image] =>[orig_patent_app_number] => 12657857 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6265400 [patent_doc_number] => 20100253414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'SAMPLING' [patent_app_type] => utility [patent_app_number] => 12/686757 [patent_app_country] => US [patent_app_date] => 2010-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 27920 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20100253414.pdf [firstpage_image] =>[orig_patent_app_number] => 12686757 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6282539 [patent_doc_number] => 20100156500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'SEMICONDUCTOR DEVICE, OUTPUT CIRCUIT AND METHOD FOR CONTROLLING INPUT/OUTPUT BUFFER CIRCUIT IN SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/644956 [patent_app_country] => US [patent_app_date] => 2009-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8672 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20100156500.pdf [firstpage_image] =>[orig_patent_app_number] => 12644956 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8956808 [patent_doc_number] => 08502590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'System and method of controlling devices operating within different voltage ranges' [patent_app_type] => utility [patent_app_number] => 12/636875 [patent_app_country] => US [patent_app_date] => 2009-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8186 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12636875 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5973169 [patent_doc_number] => 20110068832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-24 [patent_title] => 'DRIVING CIRCUIT FOR POWER MOSFET' [patent_app_type] => utility [patent_app_number] => 12/608008 [patent_app_country] => US [patent_app_date] => 2009-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2278 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20110068832.pdf [firstpage_image] =>[orig_patent_app_number] => 12608008 [rel_patent_id] =>[rel_patent_doc_number] =>)