Khareem E. Almo

Array ( [id] => 44057 [patent_doc_number] => 07782120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Internal voltage generating circuit' [patent_app_type] => utility [patent_app_number] => 12/051748 [patent_app_country] => US [patent_app_date] => 2008-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 6775 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/782/07782120.pdf [firstpage_image] =>[orig_patent_app_number] => 12051748 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 113197 [patent_doc_number] => 07719340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-18 [patent_title] => 'Internal voltage trimming circuit for use in a semiconductor memory device and method thereof' [patent_app_type] => utility [patent_app_number] => 12/071426 [patent_app_country] => US [patent_app_date] => 2008-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2343 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/719/07719340.pdf [firstpage_image] =>[orig_patent_app_number] => 12071426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 63912 [patent_doc_number] => 07764104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-27 [patent_title] => 'Self clock generation' [patent_app_type] => utility [patent_app_number] => 12/034347 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7175 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/764/07764104.pdf [firstpage_image] =>[orig_patent_app_number] => 12034347 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4857118 [patent_doc_number] => 20080265968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'CLOCK FREQUENCY DIFFUSING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/033050 [patent_app_country] => US [patent_app_date] => 2008-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5999 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20080265968.pdf [firstpage_image] =>[orig_patent_app_number] => 12033050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4811143 [patent_doc_number] => 20080191774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'Clock Circuit' [patent_app_type] => utility [patent_app_number] => 12/028415 [patent_app_country] => US [patent_app_date] => 2008-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5785 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20080191774.pdf [firstpage_image] =>[orig_patent_app_number] => 12028415 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6376021 [patent_doc_number] => 20100081378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'Wireless Processing System, Wireless Processing Method, and Wireless Electronic Device' [patent_app_type] => utility [patent_app_number] => 12/514943 [patent_app_country] => US [patent_app_date] => 2007-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 22290 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20100081378.pdf [firstpage_image] =>[orig_patent_app_number] => 12514943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4877225 [patent_doc_number] => 20080150608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Integrated semiconductor circuit' [patent_app_type] => utility [patent_app_number] => 11/953739 [patent_app_country] => US [patent_app_date] => 2007-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4620 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20080150608.pdf [firstpage_image] =>[orig_patent_app_number] => 11953739 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8573955 [patent_doc_number] => 08340611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Noise based quality estimation for signals' [patent_app_type] => utility [patent_app_number] => 12/513526 [patent_app_country] => US [patent_app_date] => 2007-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2062 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12513526 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8245448 [patent_doc_number] => 08203376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Semiconductor device and method for driving the same' [patent_app_type] => utility [patent_app_number] => 12/445390 [patent_app_country] => US [patent_app_date] => 2007-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 42 [patent_no_of_words] => 24217 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/203/08203376.pdf [firstpage_image] =>[orig_patent_app_number] => 12445390 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8666678 [patent_doc_number] => 08380150 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Received electric field intensity estimating device and received electric field intensity estimating program' [patent_app_type] => utility [patent_app_number] => 12/514155 [patent_app_country] => US [patent_app_date] => 2007-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5373 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12514155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6452363 [patent_doc_number] => 20100039157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'CLOCK ADJUSTING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 12/440967 [patent_app_country] => US [patent_app_date] => 2007-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 66 [patent_figures_cnt] => 66 [patent_no_of_words] => 24354 [patent_no_of_claims] => 84 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20100039157.pdf [firstpage_image] =>[orig_patent_app_number] => 12440967 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5947 [patent_doc_number] => 07812664 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-10-12 [patent_title] => 'Method of and circuit for suppressing noise in a circuit' [patent_app_type] => utility [patent_app_number] => 11/880198 [patent_app_country] => US [patent_app_date] => 2007-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/812/07812664.pdf [firstpage_image] =>[orig_patent_app_number] => 11880198 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5008640 [patent_doc_number] => 20070279117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'METHOD AND SYSTEM FOR HIGH FREQUENCY CLOCK SIGNAL GATING' [patent_app_type] => utility [patent_app_number] => 11/769408 [patent_app_country] => US [patent_app_date] => 2007-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1841 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20070279117.pdf [firstpage_image] =>[orig_patent_app_number] => 11769408 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4757152 [patent_doc_number] => 20080309377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'BALANCED PHASE DETECTOR' [patent_app_type] => utility [patent_app_number] => 11/762557 [patent_app_country] => US [patent_app_date] => 2007-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5341 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20080309377.pdf [firstpage_image] =>[orig_patent_app_number] => 11762557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6524502 [patent_doc_number] => 20100231269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'DRIVE CIRCUIT FOR SEMICONDUCTOR ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/294437 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 8322 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20100231269.pdf [firstpage_image] =>[orig_patent_app_number] => 12294437 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 65524 [patent_doc_number] => 07760014 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-20 [patent_title] => 'Lowpass biquad VGA filter' [patent_app_type] => utility [patent_app_number] => 11/652386 [patent_app_country] => US [patent_app_date] => 2007-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6621 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/760/07760014.pdf [firstpage_image] =>[orig_patent_app_number] => 11652386 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8203375 [patent_doc_number] => 08188780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Pulsed static flip-flop' [patent_app_type] => utility [patent_app_number] => 11/648194 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9148 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/188/08188780.pdf [firstpage_image] =>[orig_patent_app_number] => 11648194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4877243 [patent_doc_number] => 20080150626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Time variant filter with reduced settling time' [patent_app_type] => utility [patent_app_number] => 11/643291 [patent_app_country] => US [patent_app_date] => 2006-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3936 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20080150626.pdf [firstpage_image] =>[orig_patent_app_number] => 11643291 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 75683 [patent_doc_number] => 07750687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Circuit arrangement comprising a level shifter and method' [patent_app_type] => utility [patent_app_number] => 11/546009 [patent_app_country] => US [patent_app_date] => 2006-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6220 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/750/07750687.pdf [firstpage_image] =>[orig_patent_app_number] => 11546009 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8283602 [patent_doc_number] => 08217709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-10 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/510639 [patent_app_country] => US [patent_app_date] => 2006-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4078 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11510639 [rel_patent_id] =>[rel_patent_doc_number] =>)