Search

Khareem E. Almo

Examiner (ID: 12419, Phone: (571)272-5524 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2842, 2849, 2816
Total Applications
1041
Issued Applications
887
Pending Applications
71
Abandoned Applications
106

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4544544 [patent_doc_number] => 07876142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Latch inverter and flip-flop using the same' [patent_app_type] => utility [patent_app_number] => 11/200209 [patent_app_country] => US [patent_app_date] => 2005-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 3018 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/876/07876142.pdf [firstpage_image] =>[orig_patent_app_number] => 11200209 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/200209
Latch inverter and flip-flop using the same Aug 9, 2005 Issued
Array ( [id] => 4913525 [patent_doc_number] => 20080094124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'Mosfet Device and Related Method of Operation' [patent_app_type] => utility [patent_app_number] => 11/572913 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2541 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20080094124.pdf [firstpage_image] =>[orig_patent_app_number] => 11572913 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/572913
Mosfet Device and Related Method of Operation Jul 27, 2005 Abandoned
Array ( [id] => 5073447 [patent_doc_number] => 20070013422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'Clock pulse width control circuit' [patent_app_type] => utility [patent_app_number] => 11/179400 [patent_app_country] => US [patent_app_date] => 2005-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1969 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20070013422.pdf [firstpage_image] =>[orig_patent_app_number] => 11179400 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/179400
Clock pulse width control circuit Jul 11, 2005 Issued
Array ( [id] => 4992679 [patent_doc_number] => 20070008023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'Differential-type delay cell circuit' [patent_app_type] => utility [patent_app_number] => 11/175163 [patent_app_country] => US [patent_app_date] => 2005-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2231 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20070008023.pdf [firstpage_image] =>[orig_patent_app_number] => 11175163 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/175163
Differential-type delay cell circuit Jul 6, 2005 Abandoned
Array ( [id] => 6929280 [patent_doc_number] => 20050280313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-22 [patent_title] => 'Selection circuit' [patent_app_type] => utility [patent_app_number] => 11/176587 [patent_app_country] => US [patent_app_date] => 2005-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3525 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20050280313.pdf [firstpage_image] =>[orig_patent_app_number] => 11176587 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/176587
Selection circuit Jul 5, 2005 Issued
Array ( [id] => 5139517 [patent_doc_number] => 20070001733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Digital storage element architecture comprising integrated 2-to-1 multiplexer functionality' [patent_app_type] => utility [patent_app_number] => 11/172534 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11842 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20070001733.pdf [firstpage_image] =>[orig_patent_app_number] => 11172534 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/172534
Digital storage element architecture comprising integrated 2-to-1 multiplexer functionality Jun 29, 2005 Issued
Array ( [id] => 5736459 [patent_doc_number] => 20060006849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-12 [patent_title] => 'Inductor compensating circuit' [patent_app_type] => utility [patent_app_number] => 11/170719 [patent_app_country] => US [patent_app_date] => 2005-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1603 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20060006849.pdf [firstpage_image] =>[orig_patent_app_number] => 11170719 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/170719
Inductor compensating circuit Jun 27, 2005 Abandoned
Array ( [id] => 5600080 [patent_doc_number] => 20060290425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Isolated conversion apparatus for analog signal' [patent_app_type] => utility [patent_app_number] => 11/159182 [patent_app_country] => US [patent_app_date] => 2005-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1275 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20060290425.pdf [firstpage_image] =>[orig_patent_app_number] => 11159182 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/159182
Isolated conversion apparatus for analog signal Jun 22, 2005 Abandoned
Array ( [id] => 5686945 [patent_doc_number] => 20060285260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Switching circuit using closed control loop to precharge gate of switching transistor and stable open loop to switch the switching transistor' [patent_app_type] => utility [patent_app_number] => 11/157402 [patent_app_country] => US [patent_app_date] => 2005-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7773 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20060285260.pdf [firstpage_image] =>[orig_patent_app_number] => 11157402 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/157402
Switching circuit using closed control loop to precharge gate of switching transistor and stable open loop to switch the switching transistor Jun 19, 2005 Issued
Array ( [id] => 5811299 [patent_doc_number] => 20060082408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'Semiconductor switching circuit' [patent_app_type] => utility [patent_app_number] => 11/142455 [patent_app_country] => US [patent_app_date] => 2005-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4965 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20060082408.pdf [firstpage_image] =>[orig_patent_app_number] => 11142455 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/142455
Semiconductor switching circuit Jun 1, 2005 Issued
Array ( [id] => 5202851 [patent_doc_number] => 20070024330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'High frequency divider circuits and methods' [patent_app_type] => utility [patent_app_number] => 11/142705 [patent_app_country] => US [patent_app_date] => 2005-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5017 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20070024330.pdf [firstpage_image] =>[orig_patent_app_number] => 11142705 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/142705
High frequency divider circuits and methods May 31, 2005 Issued
Array ( [id] => 8376047 [patent_doc_number] => 08258845 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-09-04 [patent_title] => 'Clock auto-phasing for reduced jitter' [patent_app_type] => utility [patent_app_number] => 11/134117 [patent_app_country] => US [patent_app_date] => 2005-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5928 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11134117 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/134117
Clock auto-phasing for reduced jitter May 19, 2005 Issued
Array ( [id] => 8702202 [patent_doc_number] => 08395426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Digital power-on reset controller' [patent_app_type] => utility [patent_app_number] => 11/132280 [patent_app_country] => US [patent_app_date] => 2005-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2145 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11132280 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/132280
Digital power-on reset controller May 18, 2005 Issued
Array ( [id] => 153312 [patent_doc_number] => 07679429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-16 [patent_title] => 'Boost circuit' [patent_app_type] => utility [patent_app_number] => 11/131258 [patent_app_country] => US [patent_app_date] => 2005-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 44 [patent_no_of_words] => 9618 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/679/07679429.pdf [firstpage_image] =>[orig_patent_app_number] => 11131258 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/131258
Boost circuit May 17, 2005 Issued
Array ( [id] => 124563 [patent_doc_number] => 07705638 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-27 [patent_title] => 'Switching control circuit with reduced dead time' [patent_app_type] => utility [patent_app_number] => 11/130259 [patent_app_country] => US [patent_app_date] => 2005-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 5071 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 539 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/705/07705638.pdf [firstpage_image] =>[orig_patent_app_number] => 11130259 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/130259
Switching control circuit with reduced dead time May 16, 2005 Issued
Array ( [id] => 5774798 [patent_doc_number] => 20060103438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Initialization signal generation apparatus for use in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/131162 [patent_app_country] => US [patent_app_date] => 2005-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3818 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20060103438.pdf [firstpage_image] =>[orig_patent_app_number] => 11131162 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/131162
Initialization signal generation apparatus for use in a semiconductor device May 16, 2005 Abandoned
Array ( [id] => 9649562 [patent_doc_number] => 08803584 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-12 [patent_title] => 'Level shifter for noise and leakage suppression' [patent_app_type] => utility [patent_app_number] => 11/132052 [patent_app_country] => US [patent_app_date] => 2005-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3223 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11132052 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/132052
Level shifter for noise and leakage suppression May 16, 2005 Issued
Array ( [id] => 160558 [patent_doc_number] => 07675353 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-03-09 [patent_title] => 'Constant current and voltage generator' [patent_app_type] => utility [patent_app_number] => 11/120689 [patent_app_country] => US [patent_app_date] => 2005-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4116 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/675/07675353.pdf [firstpage_image] =>[orig_patent_app_number] => 11120689 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/120689
Constant current and voltage generator May 1, 2005 Issued
Array ( [id] => 798294 [patent_doc_number] => 07427884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-23 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/117435 [patent_app_country] => US [patent_app_date] => 2005-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 31 [patent_no_of_words] => 9793 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/427/07427884.pdf [firstpage_image] =>[orig_patent_app_number] => 11117435 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/117435
Semiconductor device Apr 28, 2005 Issued
Array ( [id] => 5060852 [patent_doc_number] => 20070222491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Method and Circuit for Reducing or Preventing Disturbance Signals When Switching off a Voltage Supply, in Particular in a Household Appliance' [patent_app_type] => utility [patent_app_number] => 11/587205 [patent_app_country] => US [patent_app_date] => 2005-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4206 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20070222491.pdf [firstpage_image] =>[orig_patent_app_number] => 11587205 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/587205
Method and Circuit for Reducing or Preventing Disturbance Signals When Switching off a Voltage Supply, in Particular in a Household Appliance Apr 20, 2005 Abandoned
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