
Khareem E. Almo
Examiner (ID: 12419, Phone: (571)272-5524 , Office: P/2842 )
| Most Active Art Unit | 2842 |
| Art Unit(s) | 2842, 2849, 2816 |
| Total Applications | 1041 |
| Issued Applications | 887 |
| Pending Applications | 71 |
| Abandoned Applications | 106 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7592687
[patent_doc_number] => 07652515
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-01-26
[patent_title] => 'Clock signal conversion system'
[patent_app_type] => utility
[patent_app_number] => 10/793359
[patent_app_country] => US
[patent_app_date] => 2004-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 2703
[patent_no_of_claims] => 71
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/652/07652515.pdf
[firstpage_image] =>[orig_patent_app_number] => 10793359
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/793359 | Clock signal conversion system | Mar 3, 2004 | Issued |
Array
(
[id] => 7811870
[patent_doc_number] => 08134402
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-03-13
[patent_title] => 'Apparatus and method for powering up with hysteresis inactive'
[patent_app_type] => utility
[patent_app_number] => 10/774799
[patent_app_country] => US
[patent_app_date] => 2004-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2130
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/134/08134402.pdf
[firstpage_image] =>[orig_patent_app_number] => 10774799
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/774799 | Apparatus and method for powering up with hysteresis inactive | Feb 8, 2004 | Issued |
Array
(
[id] => 7252181
[patent_doc_number] => 20040239383
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-02
[patent_title] => 'Reset signal generating circuit'
[patent_app_type] => new
[patent_app_number] => 10/734130
[patent_app_country] => US
[patent_app_date] => 2003-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 5398
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0239/20040239383.pdf
[firstpage_image] =>[orig_patent_app_number] => 10734130
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/734130 | Reset signal generating circuit | Dec 14, 2003 | Issued |
Array
(
[id] => 7292403
[patent_doc_number] => 20040212406
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-28
[patent_title] => 'Clock divider and clock dividing method for a DLL circuit'
[patent_app_type] => new
[patent_app_number] => 10/701306
[patent_app_country] => US
[patent_app_date] => 2003-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3053
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0212/20040212406.pdf
[firstpage_image] =>[orig_patent_app_number] => 10701306
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/701306 | Clock divider and clock dividing method for a DLL circuit | Nov 3, 2003 | Abandoned |
Array
(
[id] => 6916019
[patent_doc_number] => 20050093580
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-05
[patent_title] => 'Pre-emphasis circuitry and methods'
[patent_app_type] => utility
[patent_app_number] => 10/702195
[patent_app_country] => US
[patent_app_date] => 2003-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5218
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0093/20050093580.pdf
[firstpage_image] =>[orig_patent_app_number] => 10702195
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/702195 | Pre-emphasis circuitry and methods | Nov 3, 2003 | Issued |
Array
(
[id] => 5724671
[patent_doc_number] => 20060055431
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-16
[patent_title] => 'Phase comparator'
[patent_app_type] => utility
[patent_app_number] => 10/534655
[patent_app_country] => US
[patent_app_date] => 2003-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2964
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0055/20060055431.pdf
[firstpage_image] =>[orig_patent_app_number] => 10534655
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/534655 | Phase comparator | Nov 2, 2003 | Abandoned |
Array
(
[id] => 5718924
[patent_doc_number] => 20060071697
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-06
[patent_title] => 'Pwm generator'
[patent_app_type] => utility
[patent_app_number] => 10/535288
[patent_app_country] => US
[patent_app_date] => 2003-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5164
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0071/20060071697.pdf
[firstpage_image] =>[orig_patent_app_number] => 10535288
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/535288 | Pwm generator | Oct 28, 2003 | Abandoned |
Array
(
[id] => 6992583
[patent_doc_number] => 20050091620
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-28
[patent_title] => 'Simplified method for limiting clock pulse width'
[patent_app_type] => utility
[patent_app_number] => 10/692416
[patent_app_country] => US
[patent_app_date] => 2003-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 5204
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0091/20050091620.pdf
[firstpage_image] =>[orig_patent_app_number] => 10692416
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/692416 | Simplified method for limiting clock pulse width | Oct 22, 2003 | Issued |
Array
(
[id] => 6975945
[patent_doc_number] => 20050285660
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-29
[patent_title] => 'Frequency-independent voltage divider'
[patent_app_type] => utility
[patent_app_number] => 10/531603
[patent_app_country] => US
[patent_app_date] => 2003-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1821
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0285/20050285660.pdf
[firstpage_image] =>[orig_patent_app_number] => 10531603
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/531603 | Frequency-independent voltage divider | Sep 18, 2003 | Issued |
Array
(
[id] => 327195
[patent_doc_number] => 07514971
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-07
[patent_title] => 'Pulse width modulation current adjustment apparatus'
[patent_app_type] => utility
[patent_app_number] => 10/662029
[patent_app_country] => US
[patent_app_date] => 2003-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 1820
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 268
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/514/07514971.pdf
[firstpage_image] =>[orig_patent_app_number] => 10662029
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/662029 | Pulse width modulation current adjustment apparatus | Sep 11, 2003 | Issued |
Array
(
[id] => 6970085
[patent_doc_number] => 20050035795
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-17
[patent_title] => 'Circuit for optimizing zener diode bias current'
[patent_app_type] => utility
[patent_app_number] => 10/616201
[patent_app_country] => US
[patent_app_date] => 2003-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3321
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0035/20050035795.pdf
[firstpage_image] =>[orig_patent_app_number] => 10616201
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/616201 | Circuit for optimizing zener diode bias current | Jul 7, 2003 | Abandoned |
Array
(
[id] => 6824053
[patent_doc_number] => 20030234675
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-25
[patent_title] => 'Limiting amplifier with a power detection circuit'
[patent_app_type] => new
[patent_app_number] => 10/424869
[patent_app_country] => US
[patent_app_date] => 2003-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2653
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0234/20030234675.pdf
[firstpage_image] =>[orig_patent_app_number] => 10424869
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/424869 | Limiting amplifier with a power detection circuit | Apr 28, 2003 | Abandoned |
Array
(
[id] => 7389775
[patent_doc_number] => 20040017242
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-29
[patent_title] => 'Grid clock distribution network reducing clock skew and method for reducing the same'
[patent_app_type] => new
[patent_app_number] => 10/423942
[patent_app_country] => US
[patent_app_date] => 2003-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2732
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0017/20040017242.pdf
[firstpage_image] =>[orig_patent_app_number] => 10423942
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/423942 | Grid clock distribution network reducing clock skew and method for reducing the same | Apr 27, 2003 | Issued |
Array
(
[id] => 7445694
[patent_doc_number] => 20040196089
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-07
[patent_title] => 'Switching device'
[patent_app_type] => new
[patent_app_number] => 10/405384
[patent_app_country] => US
[patent_app_date] => 2003-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6032
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0196/20040196089.pdf
[firstpage_image] =>[orig_patent_app_number] => 10405384
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/405384 | Switching device | Apr 1, 2003 | Abandoned |
Array
(
[id] => 6728162
[patent_doc_number] => 20030184352
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-02
[patent_title] => 'Circuit with variation correction function'
[patent_app_type] => new
[patent_app_number] => 10/401604
[patent_app_country] => US
[patent_app_date] => 2003-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 7223
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20030184352.pdf
[firstpage_image] =>[orig_patent_app_number] => 10401604
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/401604 | Circuit with variation correction function | Mar 30, 2003 | Issued |
Array
(
[id] => 896615
[patent_doc_number] => 07342436
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-03-11
[patent_title] => 'Bipolar supply voltage generator and semiconductor device for same'
[patent_app_type] => utility
[patent_app_number] => 10/316901
[patent_app_country] => US
[patent_app_date] => 2002-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 9015
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/342/07342436.pdf
[firstpage_image] =>[orig_patent_app_number] => 10316901
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/316901 | Bipolar supply voltage generator and semiconductor device for same | Dec 11, 2002 | Issued |