Khiem D. Nguyen

Array ( [id] => 19943708 [patent_doc_number] => 12315845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Electronic device having a substrate-to-substrate interconnection structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/400335 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18400335 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19322153 [patent_doc_number] => 20240243700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => METHODS AND TECHNIQUES TO ACHIEVE TARGET PHASE SHIFT OVER WIDE FREQUENCY BAND IN THE INPUT OF DOHERTY POWER AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 18/400451 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9700 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18400451 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19322162 [patent_doc_number] => 20240243709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => METHODS AND TECHNIQUES TO IMPROVE STABILITY OF CASCODE AMPLIFIERS AND ENHANCE LINEUP EFFICIENCY IN MULTI-STAGE POWER AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 18/400433 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18400433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20064222 [patent_doc_number] => 20250202444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => AUTO-CALIBRATION DRIVING STRENGTH SYSTEM FOR CLASS-D AMPLIFIER [patent_app_type] => utility [patent_app_number] => 18/544362 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18544362 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19270234 [patent_doc_number] => 20240213940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => ELECTRIC CIRCUIT PROVIDING MIXING AND GAINING FUNCTIONS FOR A RF RECEIVER FRONT-END AND RF RECEIVER FRONT-END [patent_app_type] => utility [patent_app_number] => 18/543264 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8844 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18543264 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20064223 [patent_doc_number] => 20250202445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => FEEDFORWARD OFFSET CANCELLATION OF ANALOG AMPLIFIER USING OUTPUT AUTO-ZEROED GAIN STAGES [patent_app_type] => utility [patent_app_number] => 18/543896 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18543896 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19453583 [patent_doc_number] => 20240313713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => OUTPHASING AMPLIFIER [patent_app_type] => utility [patent_app_number] => 18/540105 [patent_app_country] => US [patent_app_date] => 2023-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18540105 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19484275 [patent_doc_number] => 20240332317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/536135 [patent_app_country] => US [patent_app_date] => 2023-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5781 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536135 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19741784 [patent_doc_number] => 12218637 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Drain switched split amplifier with capacitor switching for noise figure and isolation improvement in split mode [patent_app_type] => utility [patent_app_number] => 18/534153 [patent_app_country] => US [patent_app_date] => 2023-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7223 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18534153 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20053748 [patent_doc_number] => 20250191970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => FULLY SELF-ALIGNED VIAS USING A HARDMASK AND ANTISPACERS [patent_app_type] => utility [patent_app_number] => 18/532873 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18532873 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19981914 [patent_doc_number] => 12349416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Transistor structures with a metal oxide contact buffer and a method of fabricating the transistor structures [patent_app_type] => utility [patent_app_number] => 18/528545 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 5305 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18528545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19221457 [patent_doc_number] => 20240186161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => SUBSTRATE PROCESSING METHOD, THERMAL PROCESSING APPARATUS, AND SEMICONDUCTOR MANUFACTURING EQUIPMENT [patent_app_type] => utility [patent_app_number] => 18/524241 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19288129 [patent_doc_number] => 20240224612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => Display Apparatus [patent_app_type] => utility [patent_app_number] => 18/524404 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18706 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524404 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19906908 [patent_doc_number] => 12283929 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Audio amplifier circuitry [patent_app_type] => utility [patent_app_number] => 18/521667 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5893 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521667 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19741217 [patent_doc_number] => 12218062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Method of fabricating a semiconductor memory device including an extension gate cutting region [patent_app_type] => utility [patent_app_number] => 18/514716 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 10470 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19191453 [patent_doc_number] => 20240170366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => SEMICONDUCTOR PACKAGE WITH A HEAT DISSIPATION MEMBER [patent_app_type] => utility [patent_app_number] => 18/512640 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7490 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512640 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20496639 [patent_doc_number] => 12538529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Epitaxial fin structures of FINFET having an epitaxial buffer region and an epitaxial capping region [patent_app_type] => utility [patent_app_number] => 18/511711 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 5236 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511711 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19161885 [patent_doc_number] => 20240154592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => CIRCUITRY FOR AND METHODS OF GAIN CONTROL [patent_app_type] => utility [patent_app_number] => 18/505734 [patent_app_country] => US [patent_app_date] => 2023-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17043 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18505734 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19023149 [patent_doc_number] => 20240079320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => PACKAGED TRANSISTOR WITH CHANNELED DIE ATTACH MATERIALS AND PROCESS OF IMPLEMENTING THE SAME [patent_app_type] => utility [patent_app_number] => 18/505197 [patent_app_country] => US [patent_app_date] => 2023-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18169 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18505197 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20004711 [patent_doc_number] => 20250142933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => RADIO FREQUENCY DEVICE [patent_app_type] => utility [patent_app_number] => 18/505135 [patent_app_country] => US [patent_app_date] => 2023-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18505135 [rel_patent_id] =>[rel_patent_doc_number] =>)