
Khiem D. Nguyen
Examiner (ID: 4456)
| Most Active Art Unit | 2823 |
| Art Unit(s) | 2892, 2842, 2843, 4146, 2823, 2817 |
| Total Applications | 2760 |
| Issued Applications | 2233 |
| Pending Applications | 206 |
| Abandoned Applications | 396 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18395517
[patent_doc_number] => 20230163738
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-25
[patent_title] => Gain-adjustable Amplifier Circuit
[patent_app_type] => utility
[patent_app_number] => 18/090455
[patent_app_country] => US
[patent_app_date] => 2022-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7285
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 396
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090455
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/090455 | Gain-adjustable amplifier circuit | Dec 27, 2022 | Issued |
Array
(
[id] => 19270222
[patent_doc_number] => 20240213928
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-27
[patent_title] => VARIABLE GAIN OPTICAL MODULATOR WITH OPEN COLLECTOR DRIVER AMPLIFIER AND METHOD OF OPERATION
[patent_app_type] => utility
[patent_app_number] => 18/089448
[patent_app_country] => US
[patent_app_date] => 2022-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11125
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18089448
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/089448 | VARIABLE GAIN OPTICAL MODULATOR WITH OPEN COLLECTOR DRIVER AMPLIFIER AND METHOD OF OPERATION | Dec 26, 2022 | Pending |
Array
(
[id] => 19270225
[patent_doc_number] => 20240213931
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-27
[patent_title] => INSTRUMENTATION AMPLIFIER WITH BASE CURRENT COMPENSATOR FOR IMPROVED PERFORMANCE
[patent_app_type] => utility
[patent_app_number] => 18/088096
[patent_app_country] => US
[patent_app_date] => 2022-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7668
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18088096
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/088096 | INSTRUMENTATION AMPLIFIER WITH BASE CURRENT COMPENSATOR FOR IMPROVED PERFORMANCE | Dec 22, 2022 | Pending |
Array
(
[id] => 20305439
[patent_doc_number] => 12451439
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-21
[patent_title] => Bonded structure including an obstructive element directly bonded to a semiconductor element without an adhesive
[patent_app_type] => utility
[patent_app_number] => 18/087705
[patent_app_country] => US
[patent_app_date] => 2022-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 16
[patent_no_of_words] => 5637
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18087705
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/087705 | Bonded structure including an obstructive element directly bonded to a semiconductor element without an adhesive | Dec 21, 2022 | Issued |
Array
(
[id] => 19269331
[patent_doc_number] => 20240213035
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-27
[patent_title] => Adaptive Flip Chip Bonding for Semiconductor Packages
[patent_app_type] => utility
[patent_app_number] => 18/087377
[patent_app_country] => US
[patent_app_date] => 2022-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5723
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18087377
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/087377 | Adaptive Flip Chip Bonding for Semiconductor Packages | Dec 21, 2022 | Pending |
Array
(
[id] => 18320028
[patent_doc_number] => 20230118156
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-20
[patent_title] => LAYER STRUCTURES FOR MAKING DIRECT METAL-TO-METAL BONDS AT LOW TEMPERATURES IN MICROELECTRONICS
[patent_app_type] => utility
[patent_app_number] => 18/069485
[patent_app_country] => US
[patent_app_date] => 2022-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8477
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -27
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18069485
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/069485 | LAYER STRUCTURES FOR MAKING DIRECT METAL-TO-METAL BONDS AT LOW TEMPERATURES IN MICROELECTRONICS | Dec 20, 2022 | Pending |
Array
(
[id] => 18541484
[patent_doc_number] => 20230246600
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-03
[patent_title] => AMPLIFIER CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/084569
[patent_app_country] => US
[patent_app_date] => 2022-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6732
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18084569
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/084569 | AMPLIFIER CIRCUIT | Dec 19, 2022 | Pending |
Array
(
[id] => 18474072
[patent_doc_number] => 20230208360
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => OPERATIONAL AMPLIFIER
[patent_app_type] => utility
[patent_app_number] => 18/068131
[patent_app_country] => US
[patent_app_date] => 2022-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8476
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18068131
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/068131 | OPERATIONAL AMPLIFIER | Dec 18, 2022 | Pending |
Array
(
[id] => 18320614
[patent_doc_number] => 20230118742
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-20
[patent_title] => METHODS FOR FORMING CONTACT STRUCTURES AND SEMICONDUCTOR DEVICES THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/083339
[patent_app_country] => US
[patent_app_date] => 2022-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12289
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18083339
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/083339 | Semiconductor devices having a conductive layer stacking with an insulating layer and a spacer structure through the conductive layer | Dec 15, 2022 | Issued |
Array
(
[id] => 18299587
[patent_doc_number] => 20230109273
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-06
[patent_title] => METHOD TO FABRICATE UNIFORM TUNNELING DIELECTRIC OF EMBEDDED FLASH MEMORY CELL
[patent_app_type] => utility
[patent_app_number] => 18/079039
[patent_app_country] => US
[patent_app_date] => 2022-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7586
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18079039
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/079039 | Integrated chip including a tunnel dielectric layer which has different thicknesses over a protrusion region of a substrate | Dec 11, 2022 | Issued |
Array
(
[id] => 19237433
[patent_doc_number] => 20240194628
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => Semiconductor Device and Method of Die Attach with Adhesive Layer Containing Graphene-Coated Core
[patent_app_type] => utility
[patent_app_number] => 18/064149
[patent_app_country] => US
[patent_app_date] => 2022-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4513
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064149
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/064149 | Semiconductor Device and Method of Die Attach with Adhesive Layer Containing Graphene-Coated Core | Dec 8, 2022 | Pending |
Array
(
[id] => 18440085
[patent_doc_number] => 20230187380
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => SEMICONDUCTOR PACKAGE INCLUDING A BARRIER STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/064241
[patent_app_country] => US
[patent_app_date] => 2022-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8217
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064241
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/064241 | SEMICONDUCTOR PACKAGE INCLUDING A BARRIER STRUCTURE | Dec 8, 2022 | Pending |
Array
(
[id] => 19705580
[patent_doc_number] => 12199630
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-14
[patent_title] => Programmable gain amplifier and a delta sigma analog-to-digital converter containing the PGA
[patent_app_type] => utility
[patent_app_number] => 18/061512
[patent_app_country] => US
[patent_app_date] => 2022-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 4870
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18061512
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/061512 | Programmable gain amplifier and a delta sigma analog-to-digital converter containing the PGA | Dec 4, 2022 | Issued |
Array
(
[id] => 19610927
[patent_doc_number] => 12159808
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-03
[patent_title] => Wire bond damage detector including a detection bond pad over a first and a second connected structures
[patent_app_type] => utility
[patent_app_number] => 18/075288
[patent_app_country] => US
[patent_app_date] => 2022-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 4089
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18075288
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/075288 | Wire bond damage detector including a detection bond pad over a first and a second connected structures | Dec 4, 2022 | Issued |
Array
(
[id] => 18858001
[patent_doc_number] => 11855599
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Circuits, equalizers and related methods
[patent_app_type] => utility
[patent_app_number] => 18/060970
[patent_app_country] => US
[patent_app_date] => 2022-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 6215
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18060970
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/060970 | Circuits, equalizers and related methods | Dec 1, 2022 | Issued |
Array
(
[id] => 19206901
[patent_doc_number] => 20240178800
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-30
[patent_title] => DYNAMIC CONTROL OF FRONT-END STAGE TRANSCONDUCTANCE IN BIPOLAR AMPLIFIERS
[patent_app_type] => utility
[patent_app_number] => 18/070985
[patent_app_country] => US
[patent_app_date] => 2022-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5001
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18070985
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/070985 | DYNAMIC CONTROL OF FRONT-END STAGE TRANSCONDUCTANCE IN BIPOLAR AMPLIFIERS | Nov 28, 2022 | Pending |
Array
(
[id] => 18271680
[patent_doc_number] => 20230092922
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-23
[patent_title] => DC COUPLED AMPLIFIER HAVING PRE-DRIVER AND BIAS CONTROL
[patent_app_type] => utility
[patent_app_number] => 18/070336
[patent_app_country] => US
[patent_app_date] => 2022-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5322
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18070336
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/070336 | DC coupled amplifier having pre-driver and bias control | Nov 27, 2022 | Issued |
Array
(
[id] => 18271078
[patent_doc_number] => 20230092320
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-23
[patent_title] => MICROELECTRONIC DEVICES HAVING A MEMORY ARRAY REGION AND A CONTROL LOGIC REGION
[patent_app_type] => utility
[patent_app_number] => 18/059165
[patent_app_country] => US
[patent_app_date] => 2022-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12925
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18059165
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/059165 | Microelectronic devices having a memory array region, a control logic region, and signal routing structures | Nov 27, 2022 | Issued |
Array
(
[id] => 19655061
[patent_doc_number] => 12176871
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-24
[patent_title] => Differential amplifier capable of offset compensation of differential output signal and adaptive continuous-time linear equalizer including the same
[patent_app_type] => utility
[patent_app_number] => 17/994171
[patent_app_country] => US
[patent_app_date] => 2022-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 3904
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17994171
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/994171 | Differential amplifier capable of offset compensation of differential output signal and adaptive continuous-time linear equalizer including the same | Nov 24, 2022 | Issued |
Array
(
[id] => 19000940
[patent_doc_number] => 11917818
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-27
[patent_title] => Memory device having vertical structure including a first wafer and a second wafer stacked on the first wafer
[patent_app_type] => utility
[patent_app_number] => 18/058795
[patent_app_country] => US
[patent_app_date] => 2022-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 16700
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18058795
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/058795 | Memory device having vertical structure including a first wafer and a second wafer stacked on the first wafer | Nov 24, 2022 | Issued |