Search

Khiem D. Nguyen

Examiner (ID: 4456)

Most Active Art Unit
2823
Art Unit(s)
2892, 2842, 2843, 4146, 2823, 2817
Total Applications
2760
Issued Applications
2233
Pending Applications
206
Abandoned Applications
396

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18395515 [patent_doc_number] => 20230163736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => SELF-BIAS SIGNAL GENERATING CIRCUIT USING DIFFERENTIAL SIGNAL AND RECEIVER INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/058584 [patent_app_country] => US [patent_app_date] => 2022-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8285 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18058584 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/058584
SELF-BIAS SIGNAL GENERATING CIRCUIT USING DIFFERENTIAL SIGNAL AND RECEIVER INCLUDING THE SAME Nov 22, 2022 Pending
Array ( [id] => 18457191 [patent_doc_number] => 20230198473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => AMPLIFIER CIRCUIT HAVING LOW PARASITIC POLE EFFECT AND BUFFER CIRCUIT THEREOF [patent_app_type] => utility [patent_app_number] => 18/056329 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18056329 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/056329
Amplifier circuit having low parasitic pole effect and buffer circuit thereof Nov 16, 2022 Issued
Array ( [id] => 19176890 [patent_doc_number] => 20240162864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => PROTECTION CIRCUIT FOR POWER AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 18/056128 [patent_app_country] => US [patent_app_date] => 2022-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7579 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18056128 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/056128
PROTECTION CIRCUIT FOR POWER AMPLIFIERS Nov 15, 2022 Pending
Array ( [id] => 19176899 [patent_doc_number] => 20240162873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => Open-Collector Variable Gain Amplifier and Method Therefor [patent_app_type] => utility [patent_app_number] => 18/055647 [patent_app_country] => US [patent_app_date] => 2022-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18055647 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/055647
Open-Collector Variable Gain Amplifier and Method Therefor Nov 14, 2022 Pending
Array ( [id] => 18821880 [patent_doc_number] => 20230396221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => PUSH-PULL POWER AMPLIFIER [patent_app_type] => utility [patent_app_number] => 17/984267 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2998 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17984267 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/984267
Push-pull power amplifier Nov 9, 2022 Issued
Array ( [id] => 18380469 [patent_doc_number] => 20230155559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 18/054164 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3986 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054164 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/054164
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Nov 9, 2022 Pending
Array ( [id] => 19176136 [patent_doc_number] => 20240162110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE ASSEMBLIES AND METHODS OF MANUFACTURE [patent_app_type] => utility [patent_app_number] => 18/054229 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054229 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/054229
SEMICONDUCTOR DEVICE PACKAGE ASSEMBLIES AND METHODS OF MANUFACTURE Nov 9, 2022 Pending
Array ( [id] => 19161202 [patent_doc_number] => 20240153909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => HOT VIA DIE ATTACH JETTING [patent_app_type] => utility [patent_app_number] => 18/053915 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10348 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18053915 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/053915
HOT VIA DIE ATTACH JETTING Nov 8, 2022 Pending
Array ( [id] => 18241656 [patent_doc_number] => 20230073967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => MULTI-PHASE-BASED DOHERTY POWER AMPLIFIER METHOD AND APPARATUS [patent_app_type] => utility [patent_app_number] => 17/983549 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10969 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17983549 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/983549
MULTI-PHASE-BASED DOHERTY POWER AMPLIFIER METHOD AND APPARATUS Nov 8, 2022 Pending
Array ( [id] => 18744123 [patent_doc_number] => 20230353111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => Circuitry for and Methods of Gain Control [patent_app_type] => utility [patent_app_number] => 17/982864 [patent_app_country] => US [patent_app_date] => 2022-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17982864 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/982864
Circuitry for and Methods of Gain Control Nov 7, 2022 Pending
Array ( [id] => 18195163 [patent_doc_number] => 20230048682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => DOHERTY AMPLIFIER [patent_app_type] => utility [patent_app_number] => 17/979251 [patent_app_country] => US [patent_app_date] => 2022-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4877 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17979251 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/979251
DOHERTY AMPLIFIER Nov 1, 2022 Pending
Array ( [id] => 19183783 [patent_doc_number] => 11990383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Package structure having at least one die with a plurality of taper-shaped die connectors [patent_app_type] => utility [patent_app_number] => 17/979713 [patent_app_country] => US [patent_app_date] => 2022-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 58 [patent_figures_cnt] => 103 [patent_no_of_words] => 21047 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17979713 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/979713
Package structure having at least one die with a plurality of taper-shaped die connectors Nov 1, 2022 Issued
Array ( [id] => 19147215 [patent_doc_number] => 20240146268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => REDUCTION OF NOISE AND WEAK AVALANCHE CURRENT INDUCED ERRORS IN BIPOLAR AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 17/977435 [patent_app_country] => US [patent_app_date] => 2022-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17977435 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/977435
REDUCTION OF NOISE AND WEAK AVALANCHE CURRENT INDUCED ERRORS IN BIPOLAR AMPLIFIERS Oct 30, 2022 Pending
Array ( [id] => 18661321 [patent_doc_number] => 20230307334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/977167 [patent_app_country] => US [patent_app_date] => 2022-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17977167 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/977167
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME Oct 30, 2022 Pending
Array ( [id] => 18240500 [patent_doc_number] => 20230072811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => Wireless Communication Apparatus, System, and Signal Processing Method [patent_app_type] => utility [patent_app_number] => 18/050754 [patent_app_country] => US [patent_app_date] => 2022-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17171 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18050754 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/050754
Wireless Communication Apparatus, System, and Signal Processing Method Oct 27, 2022 Pending
Array ( [id] => 18238505 [patent_doc_number] => 20230070816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => AMPLIFIER CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/050082 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6947 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18050082 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/050082
AMPLIFIER CIRCUIT Oct 26, 2022 Pending
Array ( [id] => 18159550 [patent_doc_number] => 20230026142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => AMPLIFIER CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/960884 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960884 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960884
AMPLIFIER CIRCUIT Oct 5, 2022 Pending
Array ( [id] => 18169672 [patent_doc_number] => 20230036283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => PACKAGE STRUCTURE WITH BRIDGE DIE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/960767 [patent_app_country] => US [patent_app_date] => 2022-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960767 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960767
Package structure with bridge die laterally wrapped by insulating encapsulant and surrounded by through vias and method of forming the package structure Oct 4, 2022 Issued
Array ( [id] => 18875312 [patent_doc_number] => 11863138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Transconductance circuits with degeneration transistors [patent_app_type] => utility [patent_app_number] => 17/959481 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 10215 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959481 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959481
Transconductance circuits with degeneration transistors Oct 3, 2022 Issued
Array ( [id] => 18555268 [patent_doc_number] => 20230253285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/959580 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4581 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959580 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959580
PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME Oct 3, 2022 Pending
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