Khiem M Nguyen

Array ( [id] => 15517079 [patent_doc_number] => 10565127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Apparatus and method for managing a virtual graphics processor unit (VGPU) [patent_app_type] => utility [patent_app_number] => 15/815511 [patent_app_country] => US [patent_app_date] => 2017-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 16219 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15815511 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15820845 [patent_doc_number] => 10635602 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Address translation prior to receiving a storage reference using the address to be translated [patent_app_type] => utility [patent_app_number] => 15/812403 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 51 [patent_no_of_words] => 25658 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812403 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16278952 [patent_doc_number] => 10761983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-01 [patent_title] => Memory based configuration state registers [patent_app_type] => utility [patent_app_number] => 15/812344 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 51 [patent_no_of_words] => 26045 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812344 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15472393 [patent_doc_number] => 10552070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Separation of memory-based configuration state registers based on groups [patent_app_type] => utility [patent_app_number] => 15/812319 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 51 [patent_no_of_words] => 25779 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 375 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812319 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14314171 [patent_doc_number] => 20190146789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => CONFIGURABLE ARCHITECTURAL PLACEMENT CONTROL [patent_app_type] => utility [patent_app_number] => 15/812297 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25638 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812297 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16065329 [patent_doc_number] => 10691614 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-23 [patent_title] => Adaptive page replacement [patent_app_type] => utility [patent_app_number] => 15/812784 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2820 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812784 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12612198 [patent_doc_number] => 20180095896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => MAINTAINING CACHE CONSISTENCY IN A CACHE FOR CACHE EVICTION POLICIES SUPPORTING DEPENDENCIES [patent_app_type] => utility [patent_app_number] => 15/809015 [patent_app_country] => US [patent_app_date] => 2017-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5945 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15809015 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12180483 [patent_doc_number] => 20180039419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'VIRTUAL STORAGE POOL' [patent_app_type] => utility [patent_app_number] => 15/719234 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3383 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15719234 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13332433 [patent_doc_number] => 20180217754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/704699 [patent_app_country] => US [patent_app_date] => 2017-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10708 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15704699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14669415 [patent_doc_number] => 10372609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Fast cache warm-up [patent_app_type] => utility [patent_app_number] => 15/704130 [patent_app_country] => US [patent_app_date] => 2017-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6738 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15704130 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11983382 [patent_doc_number] => 20170287537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'LOW POWER CONSUMPTION MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/629722 [patent_app_country] => US [patent_app_date] => 2017-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6353 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15629722 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13541021 [patent_doc_number] => 20180322057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => Computing In Parallel Processing Environments [patent_app_type] => utility [patent_app_number] => 15/584327 [patent_app_country] => US [patent_app_date] => 2017-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15584327 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12032633 [patent_doc_number] => 20170322732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'COMPUTER SYSTEMS AND METHODS FOR IMPLEMENTING IN-MEMORY DATA STRUCTURES' [patent_app_type] => utility [patent_app_number] => 15/584113 [patent_app_country] => US [patent_app_date] => 2017-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9132 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15584113 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13721237 [patent_doc_number] => 20170371573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-28 [patent_title] => METHOD OF OPERATING STORAGE MEDIUM, METHOD OF OPERATING HOST CONTROLLING THE STORAGE MEDIUM, AND METHOD OF OPERATING USER SYSTEM INCLUDING THE STORAGE MEDIUM AND THE HOST [patent_app_type] => utility [patent_app_number] => 15/583256 [patent_app_country] => US [patent_app_date] => 2017-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13922 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15583256 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12590928 [patent_doc_number] => 20180088805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => STORAGE DEVICE THAT WRITES DATA FROM A HOST DURING GARBAGE COLLECTION [patent_app_type] => utility [patent_app_number] => 15/441068 [patent_app_country] => US [patent_app_date] => 2017-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12915 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15441068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14668901 [patent_doc_number] => 10372351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Techniques for non-blocking control information and data synchronization by a data storage device [patent_app_type] => utility [patent_app_number] => 15/440394 [patent_app_country] => US [patent_app_date] => 2017-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 7775 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15440394 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13376335 [patent_doc_number] => 20180239709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => MEMORY PARTITIONING FOR A COMPUTING SYSTEM WITH MEMORY POOLS [patent_app_type] => utility [patent_app_number] => 15/440242 [patent_app_country] => US [patent_app_date] => 2017-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5663 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15440242 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13376009 [patent_doc_number] => 20180239546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => HANDLING DATA SLICE REVISIONS IN A DISPERSED STORAGE NETWORK [patent_app_type] => utility [patent_app_number] => 15/440454 [patent_app_country] => US [patent_app_date] => 2017-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15440454 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13375981 [patent_doc_number] => 20180239532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => TECHNIQUES FOR PERFORMING A NON-BLOCKING CONTROL SYNC OPERATION [patent_app_type] => utility [patent_app_number] => 15/440505 [patent_app_country] => US [patent_app_date] => 2017-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15440505 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13376017 [patent_doc_number] => 20180239550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => Optimizable Heap for Embedded and Similar Systems with Enhanced Debugging and Self-Healing [patent_app_type] => utility [patent_app_number] => 15/441065 [patent_app_country] => US [patent_app_date] => 2017-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15441065 [rel_patent_id] =>[rel_patent_doc_number] =>)