Search

Kibrom K. Gebresilassie

Examiner (ID: 3051, Phone: (571)272-8571 , Office: P/2128 )

Most Active Art Unit
2128
Art Unit(s)
2148, 2129, 2128, 2189
Total Applications
819
Issued Applications
542
Pending Applications
82
Abandoned Applications
220

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4496450 [patent_doc_number] => 07904288 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-03-08 [patent_title] => 'Hardware emulator having a variable input emulation group' [patent_app_type] => utility [patent_app_number] => 11/593295 [patent_app_country] => US [patent_app_date] => 2006-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4584 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/904/07904288.pdf [firstpage_image] =>[orig_patent_app_number] => 11593295 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/593295
Hardware emulator having a variable input emulation group Nov 5, 2006 Issued
Array ( [id] => 5248430 [patent_doc_number] => 20070244664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'Resistance calculating method' [patent_app_type] => utility [patent_app_number] => 11/586977 [patent_app_country] => US [patent_app_date] => 2006-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 793 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20070244664.pdf [firstpage_image] =>[orig_patent_app_number] => 11586977 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/586977
Resistance calculating method Oct 25, 2006 Abandoned
Array ( [id] => 5108334 [patent_doc_number] => 20070067212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'SYSTEM AND METHOD FOR AIDING PRODUCT DESIGN AND QUANTIFYING ACCEPTANCE' [patent_app_type] => utility [patent_app_number] => 11/534035 [patent_app_country] => US [patent_app_date] => 2006-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5488 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20070067212.pdf [firstpage_image] =>[orig_patent_app_number] => 11534035 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/534035
System and method for aiding product design and quantifying acceptance Sep 20, 2006 Issued
Array ( [id] => 5516204 [patent_doc_number] => 20090216511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'Sensor Simulator' [patent_app_type] => utility [patent_app_number] => 11/991066 [patent_app_country] => US [patent_app_date] => 2006-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2461 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20090216511.pdf [firstpage_image] =>[orig_patent_app_number] => 11991066 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/991066
Sensor Simulator Jul 12, 2006 Abandoned
Array ( [id] => 5625620 [patent_doc_number] => 20060264125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Computer-Aided Progressive Die Design System and Method' [patent_app_type] => utility [patent_app_number] => 11/420180 [patent_app_country] => US [patent_app_date] => 2006-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6930 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20060264125.pdf [firstpage_image] =>[orig_patent_app_number] => 11420180 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/420180
Computer-aided progressive die design system and method May 23, 2006 Issued
Array ( [id] => 5926905 [patent_doc_number] => 20060241923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'Automated systems and methods for generating statistical models' [patent_app_type] => utility [patent_app_number] => 11/415427 [patent_app_country] => US [patent_app_date] => 2006-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14160 [patent_no_of_claims] => 69 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20060241923.pdf [firstpage_image] =>[orig_patent_app_number] => 11415427 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/415427
Automated systems and methods for generating statistical models May 1, 2006 Abandoned
Array ( [id] => 7981831 [patent_doc_number] => 08073671 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-06 [patent_title] => 'Dynamic software performance models' [patent_app_type] => utility [patent_app_number] => 11/394474 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 9158 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/073/08073671.pdf [firstpage_image] =>[orig_patent_app_number] => 11394474 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394474
Dynamic software performance models Mar 30, 2006 Issued
Array ( [id] => 57205 [patent_doc_number] => 07774177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-10 [patent_title] => 'Exoskeleton controller for a human-exoskeleton system' [patent_app_type] => utility [patent_app_number] => 11/395654 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 11159 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/774/07774177.pdf [firstpage_image] =>[orig_patent_app_number] => 11395654 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/395654
Exoskeleton controller for a human-exoskeleton system Mar 29, 2006 Issued
Array ( [id] => 4577930 [patent_doc_number] => 07840398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Techniques for unified management communication for virtualization systems' [patent_app_type] => utility [patent_app_number] => 11/390687 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8660 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/840/07840398.pdf [firstpage_image] =>[orig_patent_app_number] => 11390687 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/390687
Techniques for unified management communication for virtualization systems Mar 27, 2006 Issued
Array ( [id] => 5173560 [patent_doc_number] => 20070073999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Hardware acceleration system for logic simulation using shift register as local cache with path for bypassing shift register' [patent_app_type] => utility [patent_app_number] => 11/291164 [patent_app_country] => US [patent_app_date] => 2005-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 15428 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20070073999.pdf [firstpage_image] =>[orig_patent_app_number] => 11291164 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/291164
Hardware acceleration system for logic simulation using shift register as local cache with path for bypassing shift register Nov 29, 2005 Abandoned
Array ( [id] => 5190432 [patent_doc_number] => 20070168741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'Method, system and program product for facilitating debugging of simulation results obtained for an optimized simulation model of a device design having hierarchically-connected components' [patent_app_type] => utility [patent_app_number] => 11/282091 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4924 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20070168741.pdf [firstpage_image] =>[orig_patent_app_number] => 11282091 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/282091
Method, system and program product for facilitating debugging of simulation results obtained for an optimized simulation model of a device design having hierarchically-connected components Nov 16, 2005 Abandoned
Array ( [id] => 4973216 [patent_doc_number] => 20070113219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Representing simulation values of variable in sharpley limited time and space' [patent_app_type] => utility [patent_app_number] => 11/282878 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7812 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20070113219.pdf [firstpage_image] =>[orig_patent_app_number] => 11282878 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/282878
Representing simulation values of variable in sharpley limited time and space Nov 16, 2005 Abandoned
Array ( [id] => 4972549 [patent_doc_number] => 20070112552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Native function of portable electronic device surfaced as soft device in host computer' [patent_app_type] => utility [patent_app_number] => 11/282089 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2597 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20070112552.pdf [firstpage_image] =>[orig_patent_app_number] => 11282089 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/282089
Method for emulating a native device on a host computer system Nov 16, 2005 Issued
Array ( [id] => 5192742 [patent_doc_number] => 20070081224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Joint optics and image processing adjustment of electro-optic imaging systems' [patent_app_type] => utility [patent_app_number] => 11/245563 [patent_app_country] => US [patent_app_date] => 2005-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7441 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20070081224.pdf [firstpage_image] =>[orig_patent_app_number] => 11245563 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/245563
Joint optics and image processing adjustment of electro-optic imaging systems Oct 6, 2005 Abandoned
Array ( [id] => 5127097 [patent_doc_number] => 20070239368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Condition lifecycle mathematical model and process' [patent_app_type] => utility [patent_app_number] => 11/223251 [patent_app_country] => US [patent_app_date] => 2005-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7481 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20070239368.pdf [firstpage_image] =>[orig_patent_app_number] => 11223251 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/223251
Employing a dynamic lifecycle condition index (CI) to accommodate for changes in the expected service life of an item based on observance of the item and select extrinsic factors Sep 7, 2005 Issued
Array ( [id] => 7693292 [patent_doc_number] => 20070016394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'System and method for using model analysis to generate directed test vectors' [patent_app_type] => utility [patent_app_number] => 11/173977 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5037 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20070016394.pdf [firstpage_image] =>[orig_patent_app_number] => 11173977 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/173977
System and method for using model analysis to generate directed test vectors Jun 29, 2005 Issued
Array ( [id] => 6978153 [patent_doc_number] => 20050287871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Device, method, and program for computer aided design of flexible substrates' [patent_app_type] => utility [patent_app_number] => 11/156659 [patent_app_country] => US [patent_app_date] => 2005-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6235 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20050287871.pdf [firstpage_image] =>[orig_patent_app_number] => 11156659 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/156659
Device, method, and program for computer aided design of flexible substrates Jun 20, 2005 Abandoned
Array ( [id] => 4995630 [patent_doc_number] => 20070010975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'Probabilistic regression suites for functional verification' [patent_app_type] => utility [patent_app_number] => 11/145866 [patent_app_country] => US [patent_app_date] => 2005-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10378 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 42 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20070010975.pdf [firstpage_image] =>[orig_patent_app_number] => 11145866 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/145866
Probabilistic regression suites for functional verification Jun 5, 2005 Issued
Array ( [id] => 5643778 [patent_doc_number] => 20060282233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Method for the fast exploration of bus-based communication architectures at the cycle-count-accurate-at-transaction -boundaries (CCATB) abstraction' [patent_app_type] => utility [patent_app_number] => 11/139370 [patent_app_country] => US [patent_app_date] => 2005-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11147 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0282/20060282233.pdf [firstpage_image] =>[orig_patent_app_number] => 11139370 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/139370
Method for the fast exploration of bus-based communication architectures at the cycle-count-accurate-at-transaction-boundaries (CCATB) abstraction May 25, 2005 Issued
Array ( [id] => 9665262 [patent_doc_number] => 08812269 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-19 [patent_title] => 'Dynamic range assessment in block diagram systems' [patent_app_type] => utility [patent_app_number] => 11/137006 [patent_app_country] => US [patent_app_date] => 2005-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 7381 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11137006 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/137006
Dynamic range assessment in block diagram systems May 23, 2005 Issued
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