Kibrom K. Gebresilassie

Array ( [id] => 7216090 [patent_doc_number] => 20040088670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Process and apparatus for finding paths through a routing space' [patent_app_type] => new [patent_app_number] => 10/693484 [patent_app_country] => US [patent_app_date] => 2003-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 14618 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20040088670.pdf [firstpage_image] =>[orig_patent_app_number] => 10693484 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7165191 [patent_doc_number] => 20050086042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'Parallel instances of a plurality of systems on chip in hardware emulator verification' [patent_app_type] => utility [patent_app_number] => 10/685762 [patent_app_country] => US [patent_app_date] => 2003-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2146 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20050086042.pdf [firstpage_image] =>[orig_patent_app_number] => 10685762 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 594264 [patent_doc_number] => 07454323 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-11-18 [patent_title] => 'Method for creation of secure simulation models' [patent_app_type] => utility [patent_app_number] => 10/646193 [patent_app_country] => US [patent_app_date] => 2003-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 12382 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/454/07454323.pdf [firstpage_image] =>[orig_patent_app_number] => 10646193 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4546305 [patent_doc_number] => 07873506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-18 [patent_title] => 'Simulation framework with support for multiple integrated circuits having potentially differing characteristics' [patent_app_type] => utility [patent_app_number] => 10/609781 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3347 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/873/07873506.pdf [firstpage_image] =>[orig_patent_app_number] => 10609781 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6806243 [patent_doc_number] => 20030233637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-18 [patent_title] => 'Universal system component emulator with human readable output' [patent_app_type] => new [patent_app_number] => 10/462392 [patent_app_country] => US [patent_app_date] => 2003-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12934 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20030233637.pdf [firstpage_image] =>[orig_patent_app_number] => 10462392 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7298967 [patent_doc_number] => 20040215428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'Method for producing property-preserving variable resolution models of surfaces' [patent_app_type] => new [patent_app_number] => 10/458612 [patent_app_country] => US [patent_app_date] => 2003-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5845 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20040215428.pdf [firstpage_image] =>[orig_patent_app_number] => 10458612 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16840 [patent_doc_number] => 07805287 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-09-28 [patent_title] => 'Node emulator' [patent_app_type] => utility [patent_app_number] => 10/455567 [patent_app_country] => US [patent_app_date] => 2003-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7502 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/805/07805287.pdf [firstpage_image] =>[orig_patent_app_number] => 10455567 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7277111 [patent_doc_number] => 20040236562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Using multiple simulation environments' [patent_app_type] => new [patent_app_number] => 10/445272 [patent_app_country] => US [patent_app_date] => 2003-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2328 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20040236562.pdf [firstpage_image] =>[orig_patent_app_number] => 10445272 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7392367 [patent_doc_number] => 20040083441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => 'Method of generating net-list for designing integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/440678 [patent_app_country] => US [patent_app_date] => 2003-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2551 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20040083441.pdf [firstpage_image] =>[orig_patent_app_number] => 10440678 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 461419 [patent_doc_number] => 07246054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-17 [patent_title] => 'Discrete event simulation system and method' [patent_app_type] => utility [patent_app_number] => 10/436890 [patent_app_country] => US [patent_app_date] => 2003-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 12105 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/246/07246054.pdf [firstpage_image] =>[orig_patent_app_number] => 10436890 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7405195 [patent_doc_number] => 20040019468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Method for combining decision procedures with satisfiability solvers' [patent_app_type] => new [patent_app_number] => 10/431780 [patent_app_country] => US [patent_app_date] => 2003-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9027 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20040019468.pdf [firstpage_image] =>[orig_patent_app_number] => 10431780 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7356172 [patent_doc_number] => 20040249616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Resource modeler system and method' [patent_app_type] => new [patent_app_number] => 10/414792 [patent_app_country] => US [patent_app_date] => 2003-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4707 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20040249616.pdf [firstpage_image] =>[orig_patent_app_number] => 10414792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 531775 [patent_doc_number] => 07194389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-20 [patent_title] => 'Fusion of data from differing mathematical models' [patent_app_type] => utility [patent_app_number] => 10/395168 [patent_app_country] => US [patent_app_date] => 2003-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4477 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 359 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/194/07194389.pdf [firstpage_image] =>[orig_patent_app_number] => 10395168 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6866227 [patent_doc_number] => 20030191753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-09 [patent_title] => 'Filtering contents using a learning mechanism' [patent_app_type] => new [patent_app_number] => 10/400018 [patent_app_country] => US [patent_app_date] => 2003-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9497 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20030191753.pdf [firstpage_image] =>[orig_patent_app_number] => 10400018 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6831583 [patent_doc_number] => 20030182641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Rapid input/output probing apparatus and input/output probing method using the same, and mixed emulation/simulation method based on it' [patent_app_type] => new [patent_app_number] => 10/312419 [patent_app_country] => US [patent_app_date] => 2003-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 18936 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 1 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20030182641.pdf [firstpage_image] =>[orig_patent_app_number] => 10312419 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7672281 [patent_doc_number] => 20040181498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Constrained system identification for incorporation of a priori knowledge' [patent_app_type] => new [patent_app_number] => 10/385915 [patent_app_country] => US [patent_app_date] => 2003-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9431 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20040181498.pdf [firstpage_image] =>[orig_patent_app_number] => 10385915 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 287108 [patent_doc_number] => 07552040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => 'Method and system for modeling logical circuit blocks including transistor gate capacitance loading effects' [patent_app_type] => utility [patent_app_number] => 10/366439 [patent_app_country] => US [patent_app_date] => 2003-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3237 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/552/07552040.pdf [firstpage_image] =>[orig_patent_app_number] => 10366439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7676622 [patent_doc_number] => 20040153204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'System and method for producing simulated oil paintings' [patent_app_type] => new [patent_app_number] => 10/354655 [patent_app_country] => US [patent_app_date] => 2003-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5917 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20040153204.pdf [firstpage_image] =>[orig_patent_app_number] => 10354655 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7365051 [patent_doc_number] => 20040015255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Process for the optimization of the design of an electric power train' [patent_app_type] => new [patent_app_number] => 10/346553 [patent_app_country] => US [patent_app_date] => 2003-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3051 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20040015255.pdf [firstpage_image] =>[orig_patent_app_number] => 10346553 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6739180 [patent_doc_number] => 20030156549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-21 [patent_title] => 'Method and system for evaluating wireless applications' [patent_app_type] => new [patent_app_number] => 10/340348 [patent_app_country] => US [patent_app_date] => 2003-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5442 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20030156549.pdf [firstpage_image] =>[orig_patent_app_number] => 10340348 [rel_patent_id] =>[rel_patent_doc_number] =>)