Search

Kiesha Rose Bryant

Supervisory Patent Examiner (ID: 12435, Phone: (571)272-1844 , Office: P/2800 )

Most Active Art Unit
2822
Art Unit(s)
2822, 2891
Total Applications
376
Issued Applications
266
Pending Applications
8
Abandoned Applications
102

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6506913 [patent_doc_number] => 20020135048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-26 [patent_title] => 'Doped aluminum oxide dielectrics' [patent_app_type] => new [patent_app_number] => 09/792777 [patent_app_country] => US [patent_app_date] => 2001-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4581 [patent_no_of_claims] => 142 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20020135048.pdf [firstpage_image] =>[orig_patent_app_number] => 09792777 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/792777
Doped aluminum oxide dielectrics Feb 22, 2001 Issued
Array ( [id] => 1207158 [patent_doc_number] => 06717254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Devices having substrates with opening passing through the substrates and conductors in the openings, and methods of manufacture' [patent_app_type] => B2 [patent_app_number] => 09/791977 [patent_app_country] => US [patent_app_date] => 2001-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 30 [patent_no_of_words] => 3916 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717254.pdf [firstpage_image] =>[orig_patent_app_number] => 09791977 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/791977
Devices having substrates with opening passing through the substrates and conductors in the openings, and methods of manufacture Feb 21, 2001 Issued
Array ( [id] => 5918055 [patent_doc_number] => 20020113291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Fuse structure with thermal and crack-stop protection' [patent_app_type] => new [patent_app_number] => 09/788077 [patent_app_country] => US [patent_app_date] => 2001-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4172 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20020113291.pdf [firstpage_image] =>[orig_patent_app_number] => 09788077 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/788077
Fuse structure with thermal and crack-stop protection Feb 15, 2001 Issued
Array ( [id] => 1400435 [patent_doc_number] => 06545365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-08 [patent_title] => 'Resin-sealed chip stack type semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/781237 [patent_app_country] => US [patent_app_date] => 2001-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1757 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/545/06545365.pdf [firstpage_image] =>[orig_patent_app_number] => 09781237 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/781237
Resin-sealed chip stack type semiconductor device Feb 12, 2001 Issued
Array ( [id] => 1406562 [patent_doc_number] => 06538284 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-25 [patent_title] => 'SOI device with body recombination region, and method' [patent_app_type] => B1 [patent_app_number] => 09/776197 [patent_app_country] => US [patent_app_date] => 2001-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3651 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/538/06538284.pdf [firstpage_image] =>[orig_patent_app_number] => 09776197 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/776197
SOI device with body recombination region, and method Feb 1, 2001 Issued
Array ( [id] => 606775 [patent_doc_number] => 07154141 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-26 [patent_title] => 'Source side programming' [patent_app_type] => utility [patent_app_number] => 09/777007 [patent_app_country] => US [patent_app_date] => 2001-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/154/07154141.pdf [firstpage_image] =>[orig_patent_app_number] => 09777007 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/777007
Source side programming Feb 1, 2001 Issued
Array ( [id] => 1347176 [patent_doc_number] => 06586807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-01 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => B2 [patent_app_number] => 09/774717 [patent_app_country] => US [patent_app_date] => 2001-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 7734 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/586/06586807.pdf [firstpage_image] =>[orig_patent_app_number] => 09774717 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/774717
Semiconductor integrated circuit device Jan 31, 2001 Issued
Array ( [id] => 1176042 [patent_doc_number] => 06750528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Bipolar device' [patent_app_type] => B2 [patent_app_number] => 09/767477 [patent_app_country] => US [patent_app_date] => 2001-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3039 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/750/06750528.pdf [firstpage_image] =>[orig_patent_app_number] => 09767477 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/767477
Bipolar device Jan 22, 2001 Issued
Array ( [id] => 6876093 [patent_doc_number] => 20010006246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-05 [patent_title] => 'Method of manufacturing semiconductor devices, etching composition for manufacturing semiconductor devices, and semiconductor devices made using the method' [patent_app_type] => new-utility [patent_app_number] => 09/765407 [patent_app_country] => US [patent_app_date] => 2001-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9933 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20010006246.pdf [firstpage_image] =>[orig_patent_app_number] => 09765407 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/765407
Method of manufacturing semiconductor devices, etching composition for manufacturing semiconductor devices, and semiconductor devices made using the method Jan 21, 2001 Abandoned
Array ( [id] => 6891222 [patent_doc_number] => 20010017384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-30 [patent_title] => 'Method of forming a buried bitline in a vertical DRAM device' [patent_app_type] => new [patent_app_number] => 09/765562 [patent_app_country] => US [patent_app_date] => 2001-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3571 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20010017384.pdf [firstpage_image] =>[orig_patent_app_number] => 09765562 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/765562
Method of forming a buried bitline in a vertical DRAM device Jan 18, 2001 Abandoned
Array ( [id] => 6877895 [patent_doc_number] => 20010002050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-31 [patent_title] => 'Thin-film transistor array and method of fabricating the same' [patent_app_type] => new-utility [patent_app_number] => 09/756329 [patent_app_country] => US [patent_app_date] => 2001-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7431 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20010002050.pdf [firstpage_image] =>[orig_patent_app_number] => 09756329 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/756329
Thin-film transistor array and method of fabricating the same Jan 7, 2001 Abandoned
Array ( [id] => 972607 [patent_doc_number] => 06936886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'High density SRAM cell with latched vertical transistors' [patent_app_type] => utility [patent_app_number] => 09/750111 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 4647 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/936/06936886.pdf [firstpage_image] =>[orig_patent_app_number] => 09750111 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/750111
High density SRAM cell with latched vertical transistors Dec 28, 2000 Issued
Array ( [id] => 1281170 [patent_doc_number] => 06646297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-11 [patent_title] => 'Lower electrode isolation in a double-wide trench' [patent_app_type] => B2 [patent_app_number] => 09/749127 [patent_app_country] => US [patent_app_date] => 2000-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 7672 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/646/06646297.pdf [firstpage_image] =>[orig_patent_app_number] => 09749127 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/749127
Lower electrode isolation in a double-wide trench Dec 25, 2000 Issued
Array ( [id] => 664097 [patent_doc_number] => 07102195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-05 [patent_title] => 'Transistor structure for electrostatic discharge protection circuit' [patent_app_type] => utility [patent_app_number] => 09/740017 [patent_app_country] => US [patent_app_date] => 2000-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 5733 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/102/07102195.pdf [firstpage_image] =>[orig_patent_app_number] => 09740017 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/740017
Transistor structure for electrostatic discharge protection circuit Dec 19, 2000 Issued
Array ( [id] => 1047405 [patent_doc_number] => 06864574 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-08 [patent_title] => 'Semiconductor package' [patent_app_type] => utility [patent_app_number] => 09/722737 [patent_app_country] => US [patent_app_date] => 2000-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 24 [patent_no_of_words] => 11175 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/864/06864574.pdf [firstpage_image] =>[orig_patent_app_number] => 09722737 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/722737
Semiconductor package Nov 27, 2000 Issued
Array ( [id] => 672903 [patent_doc_number] => 07091513 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-15 [patent_title] => 'Cathode assemblies' [patent_app_type] => utility [patent_app_number] => 09/711587 [patent_app_country] => US [patent_app_date] => 2000-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2457 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/091/07091513.pdf [firstpage_image] =>[orig_patent_app_number] => 09711587 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/711587
Cathode assemblies Nov 12, 2000 Issued
Array ( [id] => 1246682 [patent_doc_number] => 06677662 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-13 [patent_title] => 'Clamp and heat block assembly for wire bonding a semiconductor package assembly' [patent_app_type] => B1 [patent_app_number] => 09/687487 [patent_app_country] => US [patent_app_date] => 2000-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3116 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/677/06677662.pdf [firstpage_image] =>[orig_patent_app_number] => 09687487 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/687487
Clamp and heat block assembly for wire bonding a semiconductor package assembly Oct 12, 2000 Issued
Array ( [id] => 1221710 [patent_doc_number] => 06703663 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'CMOS device using additional implant regions to enhance ESD performance and device manufactured thereby' [patent_app_type] => B1 [patent_app_number] => 09/655086 [patent_app_country] => US [patent_app_date] => 2000-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 3602 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/703/06703663.pdf [firstpage_image] =>[orig_patent_app_number] => 09655086 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/655086
CMOS device using additional implant regions to enhance ESD performance and device manufactured thereby Sep 4, 2000 Issued
Array ( [id] => 1368305 [patent_doc_number] => 06570204 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Integrated circuitry and DRAM circuitry' [patent_app_type] => B1 [patent_app_number] => 09/654297 [patent_app_country] => US [patent_app_date] => 2000-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3267 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570204.pdf [firstpage_image] =>[orig_patent_app_number] => 09654297 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/654297
Integrated circuitry and DRAM circuitry Aug 31, 2000 Issued
Array ( [id] => 1293234 [patent_doc_number] => 06630687 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-07 [patent_title] => 'Active matrix display device having wiring layers which are connected over multiple contact parts' [patent_app_type] => B1 [patent_app_number] => 09/652652 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 9319 [patent_no_of_claims] => 86 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/630/06630687.pdf [firstpage_image] =>[orig_patent_app_number] => 09652652 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/652652
Active matrix display device having wiring layers which are connected over multiple contact parts Aug 30, 2000 Issued
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