Search

Kiley Shawn Stoner

Examiner (ID: 1357, Phone: (571)272-1183 , Office: P/1735 )

Most Active Art Unit
1735
Art Unit(s)
1722, 1725, 1735, 1793, 3991
Total Applications
2934
Issued Applications
2340
Pending Applications
207
Abandoned Applications
387

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4271759 [patent_doc_number] => 06208949 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Method and apparatus for dynamical system analysis' [patent_app_type] => 1 [patent_app_number] => 9/108253 [patent_app_country] => US [patent_app_date] => 1998-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9966 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/208/06208949.pdf [firstpage_image] =>[orig_patent_app_number] => 108253 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/108253
Method and apparatus for dynamical system analysis Jun 30, 1998 Issued
Array ( [id] => 4372888 [patent_doc_number] => 06169928 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Apparatus and method for sharing data among a plurality of control devices on a communications network' [patent_app_type] => 1 [patent_app_number] => 9/109245 [patent_app_country] => US [patent_app_date] => 1998-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4526 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169928.pdf [firstpage_image] =>[orig_patent_app_number] => 109245 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/109245
Apparatus and method for sharing data among a plurality of control devices on a communications network Jun 29, 1998 Issued
Array ( [id] => 4266763 [patent_doc_number] => 06138057 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Method for gauging a mold cavity for injection molding' [patent_app_type] => 1 [patent_app_number] => 9/107405 [patent_app_country] => US [patent_app_date] => 1998-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 4199 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/138/06138057.pdf [firstpage_image] =>[orig_patent_app_number] => 107405 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/107405
Method for gauging a mold cavity for injection molding Jun 29, 1998 Issued
Array ( [id] => 4423438 [patent_doc_number] => 06230069 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'System and method for controlling the manufacture of discrete parts in semiconductor fabrication using model predictive control' [patent_app_type] => 1 [patent_app_number] => 9/105979 [patent_app_country] => US [patent_app_date] => 1998-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3884 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/230/06230069.pdf [firstpage_image] =>[orig_patent_app_number] => 105979 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/105979
System and method for controlling the manufacture of discrete parts in semiconductor fabrication using model predictive control Jun 25, 1998 Issued
Array ( [id] => 4200504 [patent_doc_number] => 06021505 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Method and apparatus for updating a timer from multiple timing domains' [patent_app_type] => 1 [patent_app_number] => 9/105479 [patent_app_country] => US [patent_app_date] => 1998-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5101 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021505.pdf [firstpage_image] =>[orig_patent_app_number] => 105479 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/105479
Method and apparatus for updating a timer from multiple timing domains Jun 25, 1998 Issued
Array ( [id] => 4257200 [patent_doc_number] => 06081889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Method of resetting a system' [patent_app_type] => 1 [patent_app_number] => 9/100817 [patent_app_country] => US [patent_app_date] => 1998-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3644 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081889.pdf [firstpage_image] =>[orig_patent_app_number] => 100817 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/100817
Method of resetting a system Jun 18, 1998 Issued
Array ( [id] => 4374259 [patent_doc_number] => 06202167 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Computer chip set for computer mother board referencing various clock rates' [patent_app_type] => 1 [patent_app_number] => 9/099977 [patent_app_country] => US [patent_app_date] => 1998-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 4700 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/202/06202167.pdf [firstpage_image] =>[orig_patent_app_number] => 099977 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/099977
Computer chip set for computer mother board referencing various clock rates Jun 18, 1998 Issued
Array ( [id] => 4421697 [patent_doc_number] => 06311093 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'System and method for simulation, modeling and scheduling of equipment maintenance and calibration in biopharmaceutical batch process manufacturing facilities' [patent_app_type] => 1 [patent_app_number] => 9/100028 [patent_app_country] => US [patent_app_date] => 1998-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 167 [patent_figures_cnt] => 183 [patent_no_of_words] => 28090 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/311/06311093.pdf [firstpage_image] =>[orig_patent_app_number] => 100028 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/100028
System and method for simulation, modeling and scheduling of equipment maintenance and calibration in biopharmaceutical batch process manufacturing facilities Jun 18, 1998 Issued
Array ( [id] => 4224417 [patent_doc_number] => 06079027 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Computer chip set for computer mother board referencing various clock rates' [patent_app_type] => 1 [patent_app_number] => 9/100515 [patent_app_country] => US [patent_app_date] => 1998-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 4703 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/079/06079027.pdf [firstpage_image] =>[orig_patent_app_number] => 100515 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/100515
Computer chip set for computer mother board referencing various clock rates Jun 18, 1998 Issued
Array ( [id] => 4200492 [patent_doc_number] => 06021504 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'High-speed internal clock synchronizing method and circuit' [patent_app_type] => 1 [patent_app_number] => 9/097671 [patent_app_country] => US [patent_app_date] => 1998-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5295 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021504.pdf [firstpage_image] =>[orig_patent_app_number] => 097671 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/097671
High-speed internal clock synchronizing method and circuit Jun 15, 1998 Issued
Array ( [id] => 4161104 [patent_doc_number] => 06061804 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Pulse generating circuit for providing a low-noise microprocessor clock signal' [patent_app_type] => 1 [patent_app_number] => 9/096733 [patent_app_country] => US [patent_app_date] => 1998-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3031 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/061/06061804.pdf [firstpage_image] =>[orig_patent_app_number] => 096733 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/096733
Pulse generating circuit for providing a low-noise microprocessor clock signal Jun 11, 1998 Issued
Array ( [id] => 4127209 [patent_doc_number] => 06058487 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Period measuring circuit with maximum frequency cutoff' [patent_app_type] => 1 [patent_app_number] => 9/089665 [patent_app_country] => US [patent_app_date] => 1998-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7091 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/058/06058487.pdf [firstpage_image] =>[orig_patent_app_number] => 089665 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/089665
Period measuring circuit with maximum frequency cutoff Jun 2, 1998 Issued
Array ( [id] => 4085751 [patent_doc_number] => 06009533 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Speculative bus cycle acknowledge for 1/2X core/bus clocking' [patent_app_type] => 1 [patent_app_number] => 9/089275 [patent_app_country] => US [patent_app_date] => 1998-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5390 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009533.pdf [firstpage_image] =>[orig_patent_app_number] => 089275 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/089275
Speculative bus cycle acknowledge for 1/2X core/bus clocking Jun 1, 1998 Issued
Array ( [id] => 4085765 [patent_doc_number] => 06009534 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Fractional phase interpolation of ring oscillator for high resolution pre-compensation' [patent_app_type] => 1 [patent_app_number] => 9/088551 [patent_app_country] => US [patent_app_date] => 1998-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7090 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009534.pdf [firstpage_image] =>[orig_patent_app_number] => 088551 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/088551
Fractional phase interpolation of ring oscillator for high resolution pre-compensation May 31, 1998 Issued
Array ( [id] => 4269621 [patent_doc_number] => 06223222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Method and system for providing quality-of-service in a data-over-cable system using configuration protocol messaging' [patent_app_type] => 1 [patent_app_number] => 9/079322 [patent_app_country] => US [patent_app_date] => 1998-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 34 [patent_no_of_words] => 23786 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/223/06223222.pdf [firstpage_image] =>[orig_patent_app_number] => 079322 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/079322
Method and system for providing quality-of-service in a data-over-cable system using configuration protocol messaging May 13, 1998 Issued
Array ( [id] => 4257473 [patent_doc_number] => 06081904 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Method for insuring data integrity during transfers' [patent_app_type] => 1 [patent_app_number] => 9/070360 [patent_app_country] => US [patent_app_date] => 1998-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2975 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081904.pdf [firstpage_image] =>[orig_patent_app_number] => 070360 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/070360
Method for insuring data integrity during transfers Apr 29, 1998 Issued
Array ( [id] => 4270854 [patent_doc_number] => 06223297 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Clock modifying method and information processing apparatus which gradually increase frequency of an external clock to be supplied to processing unit' [patent_app_type] => 1 [patent_app_number] => 9/063014 [patent_app_country] => US [patent_app_date] => 1998-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4869 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/223/06223297.pdf [firstpage_image] =>[orig_patent_app_number] => 063014 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/063014
Clock modifying method and information processing apparatus which gradually increase frequency of an external clock to be supplied to processing unit Apr 20, 1998 Issued
Array ( [id] => 4226121 [patent_doc_number] => 06029252 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Method and apparatus for generating multi-phase clock signals, and circuitry, memory devices, and computer systems using same' [patent_app_type] => 1 [patent_app_number] => 9/061859 [patent_app_country] => US [patent_app_date] => 1998-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6203 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/029/06029252.pdf [firstpage_image] =>[orig_patent_app_number] => 061859 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/061859
Method and apparatus for generating multi-phase clock signals, and circuitry, memory devices, and computer systems using same Apr 16, 1998 Issued
Array ( [id] => 3971056 [patent_doc_number] => 05991890 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Device and method for characterizing signal skew' [patent_app_type] => 1 [patent_app_number] => 9/061435 [patent_app_country] => US [patent_app_date] => 1998-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3167 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/991/05991890.pdf [firstpage_image] =>[orig_patent_app_number] => 061435 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/061435
Device and method for characterizing signal skew Apr 15, 1998 Issued
Array ( [id] => 4203753 [patent_doc_number] => 06161175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Computer system using software to establish set-up values of a central processing unit and a control method thereof' [patent_app_type] => 1 [patent_app_number] => 9/060994 [patent_app_country] => US [patent_app_date] => 1998-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 7889 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/161/06161175.pdf [firstpage_image] =>[orig_patent_app_number] => 060994 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/060994
Computer system using software to establish set-up values of a central processing unit and a control method thereof Apr 15, 1998 Issued
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