Search

Kiley Shawn Stoner

Examiner (ID: 1357, Phone: (571)272-1183 , Office: P/1735 )

Most Active Art Unit
1735
Art Unit(s)
1722, 1725, 1735, 1793, 3991
Total Applications
2934
Issued Applications
2340
Pending Applications
207
Abandoned Applications
387

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4259413 [patent_doc_number] => 06092129 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Method and apparatus for communicating signals between circuits operating at different frequencies' [patent_app_type] => 1 [patent_app_number] => 9/059614 [patent_app_country] => US [patent_app_date] => 1998-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/092/06092129.pdf [firstpage_image] =>[orig_patent_app_number] => 059614 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/059614
Method and apparatus for communicating signals between circuits operating at different frequencies Apr 12, 1998 Issued
Array ( [id] => 4167698 [patent_doc_number] => 06065128 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Anti-wafer breakage detection system' [patent_app_type] => 1 [patent_app_number] => 9/057798 [patent_app_country] => US [patent_app_date] => 1998-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3547 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/065/06065128.pdf [firstpage_image] =>[orig_patent_app_number] => 057798 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/057798
Anti-wafer breakage detection system Apr 8, 1998 Issued
Array ( [id] => 4114984 [patent_doc_number] => 06049883 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Data path clock skew management in a dynamic power management environment' [patent_app_type] => 1 [patent_app_number] => 9/053553 [patent_app_country] => US [patent_app_date] => 1998-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 9071 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049883.pdf [firstpage_image] =>[orig_patent_app_number] => 053553 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/053553
Data path clock skew management in a dynamic power management environment Mar 31, 1998 Issued
Array ( [id] => 4100438 [patent_doc_number] => 06055644 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Multi-channel architecture with channel independent clock signals' [patent_app_type] => 1 [patent_app_number] => 9/050289 [patent_app_country] => US [patent_app_date] => 1998-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5374 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055644.pdf [firstpage_image] =>[orig_patent_app_number] => 050289 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/050289
Multi-channel architecture with channel independent clock signals Mar 29, 1998 Issued
Array ( [id] => 4025628 [patent_doc_number] => 06006340 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Communication interface between two finite state machines operating at different clock domains' [patent_app_type] => 1 [patent_app_number] => 9/049967 [patent_app_country] => US [patent_app_date] => 1998-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6343 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/006/06006340.pdf [firstpage_image] =>[orig_patent_app_number] => 049967 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/049967
Communication interface between two finite state machines operating at different clock domains Mar 26, 1998 Issued
Array ( [id] => 4252868 [patent_doc_number] => 06076171 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Information processing apparatus with CPU-load-based clock frequency' [patent_app_type] => 1 [patent_app_number] => 9/048051 [patent_app_country] => US [patent_app_date] => 1998-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 12571 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/076/06076171.pdf [firstpage_image] =>[orig_patent_app_number] => 048051 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/048051
Information processing apparatus with CPU-load-based clock frequency Mar 25, 1998 Issued
Array ( [id] => 4315494 [patent_doc_number] => 06185509 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Analysis of noise in repetitive waveforms' [patent_app_type] => 1 [patent_app_number] => 9/039121 [patent_app_country] => US [patent_app_date] => 1998-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 5708 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/185/06185509.pdf [firstpage_image] =>[orig_patent_app_number] => 039121 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/039121
Analysis of noise in repetitive waveforms Mar 12, 1998 Issued
Array ( [id] => 4257486 [patent_doc_number] => 06081905 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Method and apparatus for generating a clock signal from a plurality of clock phases' [patent_app_type] => 1 [patent_app_number] => 9/041717 [patent_app_country] => US [patent_app_date] => 1998-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3080 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081905.pdf [firstpage_image] =>[orig_patent_app_number] => 041717 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/041717
Method and apparatus for generating a clock signal from a plurality of clock phases Mar 12, 1998 Issued
Array ( [id] => 4199565 [patent_doc_number] => 06038675 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Data processing circuit' [patent_app_type] => 1 [patent_app_number] => 9/037449 [patent_app_country] => US [patent_app_date] => 1998-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4846 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038675.pdf [firstpage_image] =>[orig_patent_app_number] => 037449 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/037449
Data processing circuit Mar 9, 1998 Issued
Array ( [id] => 4292805 [patent_doc_number] => 06247136 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Method and apparatus for capturing data from a non-source synchronous component in a source synchronous environment' [patent_app_type] => 1 [patent_app_number] => 9/038682 [patent_app_country] => US [patent_app_date] => 1998-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3161 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/247/06247136.pdf [firstpage_image] =>[orig_patent_app_number] => 038682 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/038682
Method and apparatus for capturing data from a non-source synchronous component in a source synchronous environment Mar 8, 1998 Issued
Array ( [id] => 4333539 [patent_doc_number] => 06317836 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Data and access protection system for computers' [patent_app_type] => 1 [patent_app_number] => 9/036240 [patent_app_country] => US [patent_app_date] => 1998-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5231 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/317/06317836.pdf [firstpage_image] =>[orig_patent_app_number] => 036240 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/036240
Data and access protection system for computers Mar 5, 1998 Issued
Array ( [id] => 3973817 [patent_doc_number] => 05978913 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Computer with periodic full power-on self test' [patent_app_type] => 1 [patent_app_number] => 9/035462 [patent_app_country] => US [patent_app_date] => 1998-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2789 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978913.pdf [firstpage_image] =>[orig_patent_app_number] => 035462 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/035462
Computer with periodic full power-on self test Mar 4, 1998 Issued
Array ( [id] => 4179530 [patent_doc_number] => 06115813 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Selectively enabling advanced configuration and power interface BIOS support' [patent_app_type] => 1 [patent_app_number] => 9/035166 [patent_app_country] => US [patent_app_date] => 1998-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1666 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115813.pdf [firstpage_image] =>[orig_patent_app_number] => 035166 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/035166
Selectively enabling advanced configuration and power interface BIOS support Mar 4, 1998 Issued
Array ( [id] => 4015366 [patent_doc_number] => 05925136 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Difference capture timer' [patent_app_type] => 1 [patent_app_number] => 9/032901 [patent_app_country] => US [patent_app_date] => 1998-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 4119 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/925/05925136.pdf [firstpage_image] =>[orig_patent_app_number] => 032901 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/032901
Difference capture timer Mar 1, 1998 Issued
Array ( [id] => 4037137 [patent_doc_number] => 05968181 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'One-chip clock synchronized memory device' [patent_app_type] => 1 [patent_app_number] => 9/018344 [patent_app_country] => US [patent_app_date] => 1998-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3859 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/968/05968181.pdf [firstpage_image] =>[orig_patent_app_number] => 018344 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/018344
One-chip clock synchronized memory device Feb 3, 1998 Issued
Array ( [id] => 4167658 [patent_doc_number] => 06065126 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Method and apparatus for executing plurality of operations per clock cycle in a single processing unit with a self-timed and self-enabled distributed clock' [patent_app_type] => 1 [patent_app_number] => 9/017278 [patent_app_country] => US [patent_app_date] => 1998-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5762 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/065/06065126.pdf [firstpage_image] =>[orig_patent_app_number] => 017278 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017278
Method and apparatus for executing plurality of operations per clock cycle in a single processing unit with a self-timed and self-enabled distributed clock Feb 1, 1998 Issued
Array ( [id] => 4110645 [patent_doc_number] => 06134670 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Method and apparatus for generation and synchronization of distributed pulse clocked mechanism digital designs' [patent_app_type] => 1 [patent_app_number] => 9/017418 [patent_app_country] => US [patent_app_date] => 1998-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6888 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/134/06134670.pdf [firstpage_image] =>[orig_patent_app_number] => 017418 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017418
Method and apparatus for generation and synchronization of distributed pulse clocked mechanism digital designs Feb 1, 1998 Issued
Array ( [id] => 4177525 [patent_doc_number] => 06105130 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Method for selectively booting from a desired peripheral device' [patent_app_type] => 1 [patent_app_number] => 9/016764 [patent_app_country] => US [patent_app_date] => 1998-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 5289 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/105/06105130.pdf [firstpage_image] =>[orig_patent_app_number] => 016764 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/016764
Method for selectively booting from a desired peripheral device Jan 29, 1998 Issued
Array ( [id] => 4171860 [patent_doc_number] => 06125452 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Terminal unit for IC card using plural protocols and control method therefor' [patent_app_type] => 1 [patent_app_number] => 9/016405 [patent_app_country] => US [patent_app_date] => 1998-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3503 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/125/06125452.pdf [firstpage_image] =>[orig_patent_app_number] => 016405 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/016405
Terminal unit for IC card using plural protocols and control method therefor Jan 29, 1998 Issued
Array ( [id] => 4085737 [patent_doc_number] => 06009532 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Multiple internal phase-locked loops for synchronization of chipset components and subsystems' [patent_app_type] => 1 [patent_app_number] => 9/012202 [patent_app_country] => US [patent_app_date] => 1998-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4328 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009532.pdf [firstpage_image] =>[orig_patent_app_number] => 012202 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/012202
Multiple internal phase-locked loops for synchronization of chipset components and subsystems Jan 22, 1998 Issued
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