Kiley Shawn Stoner

Array ( [id] => 4133529 [patent_doc_number] => 06047383 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Multiple internal phase-locked loops for synchronization of chipset components and subsystems operating at different frequencies' [patent_app_type] => 1 [patent_app_number] => 9/012479 [patent_app_country] => US [patent_app_date] => 1998-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4379 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/047/06047383.pdf [firstpage_image] =>[orig_patent_app_number] => 012479 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4231010 [patent_doc_number] => RE037272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Image communication apparatus having a function for dividing and outputting an image' [patent_app_type] => 2 [patent_app_number] => 9/009859 [patent_app_country] => US [patent_app_date] => 1998-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 3704 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/037/RE037272.pdf [firstpage_image] =>[orig_patent_app_number] => 009859 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4122286 [patent_doc_number] => 06052779 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Automatic wake-up of systems in a data processing network' [patent_app_type] => 1 [patent_app_number] => 9/005378 [patent_app_country] => US [patent_app_date] => 1998-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3822 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/052/06052779.pdf [firstpage_image] =>[orig_patent_app_number] => 005378 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4374547 [patent_doc_number] => 06175928 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Reducing timing variance of signals from an electronic device' [patent_app_type] => 1 [patent_app_number] => 9/002019 [patent_app_country] => US [patent_app_date] => 1997-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6024 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/175/06175928.pdf [firstpage_image] =>[orig_patent_app_number] => 002019 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4148999 [patent_doc_number] => 06016551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Method and apparatus for masking and unmasking a clock signal in an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/994303 [patent_app_country] => US [patent_app_date] => 1997-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3777 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/016/06016551.pdf [firstpage_image] =>[orig_patent_app_number] => 994303 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3996049 [patent_doc_number] => 05911064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-08 [patent_title] => 'Clock multiplexer with selection and deselection of clock modules' [patent_app_type] => 1 [patent_app_number] => 8/988711 [patent_app_country] => US [patent_app_date] => 1997-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4555 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/911/05911064.pdf [firstpage_image] =>[orig_patent_app_number] => 988711 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4063949 [patent_doc_number] => 05964880 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Circuit interface synchronization using slave variable delay loop' [patent_app_type] => 1 [patent_app_number] => 8/987797 [patent_app_country] => US [patent_app_date] => 1997-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3927 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/964/05964880.pdf [firstpage_image] =>[orig_patent_app_number] => 987797 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4178273 [patent_doc_number] => 06108788 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Certificate management system and method for a communication security system' [patent_app_type] => 1 [patent_app_number] => 8/986653 [patent_app_country] => US [patent_app_date] => 1997-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4527 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108788.pdf [firstpage_image] =>[orig_patent_app_number] => 986653 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4148986 [patent_doc_number] => 06016550 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Method and apparatus for audio sample rate conversion within a data-processing system' [patent_app_type] => 1 [patent_app_number] => 8/982608 [patent_app_country] => US [patent_app_date] => 1997-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3159 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/016/06016550.pdf [firstpage_image] =>[orig_patent_app_number] => 982608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4167727 [patent_doc_number] => 06065130 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Implementing counters in a system with limited primary memory' [patent_app_type] => 1 [patent_app_number] => 8/980732 [patent_app_country] => US [patent_app_date] => 1997-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3746 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/065/06065130.pdf [firstpage_image] =>[orig_patent_app_number] => 980732 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3992953 [patent_doc_number] => 05918041 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Method and apparatus for automatically adjusting a clock' [patent_app_type] => 1 [patent_app_number] => 8/979598 [patent_app_country] => US [patent_app_date] => 1997-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3421 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/918/05918041.pdf [firstpage_image] =>[orig_patent_app_number] => 979598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3973860 [patent_doc_number] => 05978916 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Method, system and computer program product for updating region-dependent software using a common update module for multiple regions' [patent_app_type] => 1 [patent_app_number] => 8/978304 [patent_app_country] => US [patent_app_date] => 1997-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2312 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978916.pdf [firstpage_image] =>[orig_patent_app_number] => 978304 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4099478 [patent_doc_number] => 06055579 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Distributed control and synchronization of multiple data processors using flexible command queues' [patent_app_type] => 1 [patent_app_number] => 8/971261 [patent_app_country] => US [patent_app_date] => 1997-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5376 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055579.pdf [firstpage_image] =>[orig_patent_app_number] => 971261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4102953 [patent_doc_number] => 06026415 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Transparent local and distributed memory management system' [patent_app_type] => 1 [patent_app_number] => 8/967395 [patent_app_country] => US [patent_app_date] => 1997-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6873 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/026/06026415.pdf [firstpage_image] =>[orig_patent_app_number] => 967395 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4065076 [patent_doc_number] => 05870594 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Data transfer system and method' [patent_app_type] => 1 [patent_app_number] => 8/963857 [patent_app_country] => US [patent_app_date] => 1997-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4487 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/870/05870594.pdf [firstpage_image] =>[orig_patent_app_number] => 963857 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3944030 [patent_doc_number] => 05953521 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Data-pattern induced skew reducer' [patent_app_type] => 1 [patent_app_number] => 8/962812 [patent_app_country] => US [patent_app_date] => 1997-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4583 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/953/05953521.pdf [firstpage_image] =>[orig_patent_app_number] => 962812 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3945457 [patent_doc_number] => 05935257 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Skew-reduction circuit and semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/961182 [patent_app_country] => US [patent_app_date] => 1997-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 9293 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/935/05935257.pdf [firstpage_image] =>[orig_patent_app_number] => 961182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4139299 [patent_doc_number] => 06073248 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Distributed precomputation of signal paths in an optical network' [patent_app_type] => 1 [patent_app_number] => 8/960462 [patent_app_country] => US [patent_app_date] => 1997-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 31 [patent_no_of_words] => 22629 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/073/06073248.pdf [firstpage_image] =>[orig_patent_app_number] => 960462 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3974036 [patent_doc_number] => 05978928 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Relative logarithmic time stamps for reduced memory map size' [patent_app_type] => 1 [patent_app_number] => 8/953280 [patent_app_country] => US [patent_app_date] => 1997-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1989 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978928.pdf [firstpage_image] =>[orig_patent_app_number] => 953280 [rel_patent_id] =>[rel_patent_doc_number] =>)