Search

Kim Kwok Chu

Examiner (ID: 4012)

Most Active Art Unit
2506
Art Unit(s)
2752, 2653, 2627, 2516, 2899, 2651, 2506
Total Applications
1354
Issued Applications
1184
Pending Applications
15
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16372381 [patent_doc_number] => 10804147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Semiconductor device with reduced via resistance [patent_app_type] => utility [patent_app_number] => 16/689142 [patent_app_country] => US [patent_app_date] => 2019-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 6819 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16689142 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/689142
Semiconductor device with reduced via resistance Nov 19, 2019 Issued
Array ( [id] => 17210805 [patent_doc_number] => 11171183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Display panel [patent_app_type] => utility [patent_app_number] => 16/688996 [patent_app_country] => US [patent_app_date] => 2019-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10432 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16688996 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/688996
Display panel Nov 18, 2019 Issued
Array ( [id] => 16001527 [patent_doc_number] => 20200176634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => LIGHT EMITTING DIODES CONTAINING DEACTIVATED REGIONS AND METHODS OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/684882 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684882 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/684882
Light emitting diodes containing deactivated regions and methods of making the same Nov 14, 2019 Issued
Array ( [id] => 16881150 [patent_doc_number] => 11031307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Semiconductor package, buffer wafer for semiconductor package, and method of manufacturing semiconductor package [patent_app_type] => utility [patent_app_number] => 16/685387 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 10489 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16685387 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/685387
Semiconductor package, buffer wafer for semiconductor package, and method of manufacturing semiconductor package Nov 14, 2019 Issued
Array ( [id] => 17093119 [patent_doc_number] => 11121317 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Low resistance crosspoint architecture [patent_app_type] => utility [patent_app_number] => 16/684520 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 11248 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684520 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/684520
Low resistance crosspoint architecture Nov 13, 2019 Issued
Array ( [id] => 17239563 [patent_doc_number] => 11183454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-23 [patent_title] => Functional component within interconnect structure of semiconductor device and method of forming same [patent_app_type] => utility [patent_app_number] => 16/674232 [patent_app_country] => US [patent_app_date] => 2019-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7054 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16674232 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/674232
Functional component within interconnect structure of semiconductor device and method of forming same Nov 4, 2019 Issued
Array ( [id] => 17224836 [patent_doc_number] => 11177346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/666958 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8237 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666958 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/666958
Semiconductor device Oct 28, 2019 Issued
Array ( [id] => 17048017 [patent_doc_number] => 11101207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Integrated circuit with cells having metal layer configured based on directions from which intercell metal interconnects connects to the metal layer [patent_app_type] => utility [patent_app_number] => 16/667021 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7038 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667021 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/667021
Integrated circuit with cells having metal layer configured based on directions from which intercell metal interconnects connects to the metal layer Oct 28, 2019 Issued
Array ( [id] => 15873849 [patent_doc_number] => 20200144328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => GaN-BASED THRESHOLD SWITCHING DEVICE AND MEMORY DIODE [patent_app_type] => utility [patent_app_number] => 16/666978 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3300 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666978 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/666978
GaN-based threshold switching device and memory diode Oct 28, 2019 Issued
Array ( [id] => 16796109 [patent_doc_number] => 20210125926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => INTEGRATED CIRCUIT WITH CIRCUIT CELLS HAVING LOWER INTERCELL ROUTING METAL LAYERS [patent_app_type] => utility [patent_app_number] => 16/667067 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6574 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667067 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/667067
Integrated circuit with circuit cells having lower intercell routing metal layers Oct 28, 2019 Issued
Array ( [id] => 18735738 [patent_doc_number] => 11804479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Scheme for enabling die reuse in 3D stacked products [patent_app_type] => utility [patent_app_number] => 16/586309 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5125 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586309 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586309
Scheme for enabling die reuse in 3D stacked products Sep 26, 2019 Issued
Array ( [id] => 17152562 [patent_doc_number] => 11145653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Multi-threshold gate structure with doped gate dielectric layer [patent_app_type] => utility [patent_app_number] => 16/585267 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 41 [patent_no_of_words] => 15280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/585267
Multi-threshold gate structure with doped gate dielectric layer Sep 26, 2019 Issued
Array ( [id] => 17152562 [patent_doc_number] => 11145653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Multi-threshold gate structure with doped gate dielectric layer [patent_app_type] => utility [patent_app_number] => 16/585267 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 41 [patent_no_of_words] => 15280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/585267
Multi-threshold gate structure with doped gate dielectric layer Sep 26, 2019 Issued
Array ( [id] => 17152562 [patent_doc_number] => 11145653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Multi-threshold gate structure with doped gate dielectric layer [patent_app_type] => utility [patent_app_number] => 16/585267 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 41 [patent_no_of_words] => 15280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/585267
Multi-threshold gate structure with doped gate dielectric layer Sep 26, 2019 Issued
Array ( [id] => 17152562 [patent_doc_number] => 11145653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Multi-threshold gate structure with doped gate dielectric layer [patent_app_type] => utility [patent_app_number] => 16/585267 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 41 [patent_no_of_words] => 15280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/585267
Multi-threshold gate structure with doped gate dielectric layer Sep 26, 2019 Issued
Array ( [id] => 16928409 [patent_doc_number] => 11049901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-29 [patent_title] => Display apparatus including light-receiving device [patent_app_type] => utility [patent_app_number] => 16/586447 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 17507 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586447 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586447
Display apparatus including light-receiving device Sep 26, 2019 Issued
Array ( [id] => 15718441 [patent_doc_number] => 20200105988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => LIGHT-EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/586398 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8963 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586398 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586398
Light-emitting device Sep 26, 2019 Issued
Array ( [id] => 15369621 [patent_doc_number] => 20200020575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => CONTACT STRUCTURES FOR INTEGRATED CIRCUIT PRODUCTS [patent_app_type] => utility [patent_app_number] => 16/579035 [patent_app_country] => US [patent_app_date] => 2019-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16579035 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/579035
Contact structures for integrated circuit products Sep 22, 2019 Issued
Array ( [id] => 16973832 [patent_doc_number] => 11069814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-20 [patent_title] => Transistor having vertical structure and electric device [patent_app_type] => utility [patent_app_number] => 16/575077 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14095 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575077 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/575077
Transistor having vertical structure and electric device Sep 17, 2019 Issued
Array ( [id] => 15274677 [patent_doc_number] => 20190386073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => DISPLAY PANELS AND DEVICES THEREOF [patent_app_type] => utility [patent_app_number] => 16/553853 [patent_app_country] => US [patent_app_date] => 2019-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3504 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553853 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/553853
Display panels and devices thereof Aug 27, 2019 Issued
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