Kim Thanh Thi Tran

Array ( [id] => 19406879 [patent_doc_number] => 20240290390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => PROGRAMMING ERASE STATE AS LAST PROGRAM STATE DURING A PROGRAMMING CYCLE OF A NON-VOLATILE MEMORY STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/225315 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225315 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20332593 [patent_doc_number] => 12462877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Program pulse duration increase for NAND program failure [patent_app_type] => utility [patent_app_number] => 18/356760 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 12305 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19348917 [patent_doc_number] => 20240257881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => ADAPTIVE ERASE SCHEME FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/222787 [patent_app_country] => US [patent_app_date] => 2023-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13426 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18222787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20139204 [patent_doc_number] => 20250246248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => PATTERN ANALYSIS ENABLED READ OPERATION IN NAND COMPONENT [patent_app_type] => utility [patent_app_number] => 18/694615 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18694615 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18926760 [patent_doc_number] => 20240029764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => STORAGE DEVICES FOR POWER OPTIMIZATION, STORAGE SYSTEMS INCLUDING THE SAME, AND OPERATING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/133566 [patent_app_country] => US [patent_app_date] => 2023-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18133566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18712565 [patent_doc_number] => 20230335198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/299332 [patent_app_country] => US [patent_app_date] => 2023-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18299332 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18990850 [patent_doc_number] => 20240062819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => NONVOLATILE MEMORY DEVICE AND MEMORY PACKAGE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/131224 [patent_app_country] => US [patent_app_date] => 2023-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19613 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18131224 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19037811 [patent_doc_number] => 20240087626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => System and Method for Generation of Unique Digital Signature Using a Non-Volatile Memory Array [patent_app_type] => utility [patent_app_number] => 18/085972 [patent_app_country] => US [patent_app_date] => 2022-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6107 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18085972 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20674063 [patent_doc_number] => 12614583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-28 [patent_title] => Concurrent scan operation on multiple blocks in a memory device [patent_app_type] => utility [patent_app_number] => 18/083077 [patent_app_country] => US [patent_app_date] => 2022-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7148 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18083077 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18833577 [patent_doc_number] => 20230402104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => PAGE BUFFER CIRCUIT, METHOD OF OPERATING A SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/073340 [patent_app_country] => US [patent_app_date] => 2022-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18073340 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18897083 [patent_doc_number] => 20240012568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/991082 [patent_app_country] => US [patent_app_date] => 2022-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17991082 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19160835 [patent_doc_number] => 20240153542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => VOLTAGE OVERSHOOT MITIGATION [patent_app_type] => utility [patent_app_number] => 17/980828 [patent_app_country] => US [patent_app_date] => 2022-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8223 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17980828 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19634339 [patent_doc_number] => 20240412788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => 3D FLASH MEMORY AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/702810 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11413 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18702810 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18812224 [patent_doc_number] => 20230386561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND CONTROLLER FOR READING DATA WITH IMPROVED SPEED, AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE AND THE CONTROLLER [patent_app_type] => utility [patent_app_number] => 17/962694 [patent_app_country] => US [patent_app_date] => 2022-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11911 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17962694 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18848501 [patent_doc_number] => 20230410905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SPLIT FOOTER TOPOLOGY TO IMPROVE VMIN AND LEAKAGE POWER FOR REGISTER FILE AND READ ONLY MEMORY DESIGNS [patent_app_type] => utility [patent_app_number] => 17/843211 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12563 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843211 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20482634 [patent_doc_number] => 12531110 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Synchronous independent plane read operation [patent_app_type] => utility [patent_app_number] => 17/707349 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4790 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17707349 [rel_patent_id] =>[rel_patent_doc_number] =>)