Search

Kimberly Ballard

Examiner (ID: 1514, Phone: (571)272-2150 , Office: P/1649 )

Most Active Art Unit
1649
Art Unit(s)
1649
Total Applications
837
Issued Applications
382
Pending Applications
80
Abandoned Applications
375

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4540906 [patent_doc_number] => 07872905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-18 [patent_title] => 'Method and apparatus for write enable and inhibit for high density spin torque three dimensional (3D) memory arrays' [patent_app_type] => utility [patent_app_number] => 12/262273 [patent_app_country] => US [patent_app_date] => 2008-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 24 [patent_no_of_words] => 9037 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/872/07872905.pdf [firstpage_image] =>[orig_patent_app_number] => 12262273 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/262273
Method and apparatus for write enable and inhibit for high density spin torque three dimensional (3D) memory arrays Oct 30, 2008 Issued
Array ( [id] => 5321684 [patent_doc_number] => 20090059674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'STORAGE APPARATUS, CONTROLLER AND CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 12/259468 [patent_app_country] => US [patent_app_date] => 2008-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 22676 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20090059674.pdf [firstpage_image] =>[orig_patent_app_number] => 12259468 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/259468
Storage apparatus, controller and control method Oct 27, 2008 Issued
Array ( [id] => 4611857 [patent_doc_number] => 07995370 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-09 [patent_title] => 'Semiconductor memory device and electronic apparatus' [patent_app_type] => utility [patent_app_number] => 12/256017 [patent_app_country] => US [patent_app_date] => 2008-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 8010 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/995/07995370.pdf [firstpage_image] =>[orig_patent_app_number] => 12256017 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/256017
Semiconductor memory device and electronic apparatus Oct 21, 2008 Issued
Array ( [id] => 7594587 [patent_doc_number] => 07626876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-01 [patent_title] => 'Semiconductor memory device and its test method' [patent_app_type] => utility [patent_app_number] => 12/288671 [patent_app_country] => US [patent_app_date] => 2008-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4000 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/626/07626876.pdf [firstpage_image] =>[orig_patent_app_number] => 12288671 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/288671
Semiconductor memory device and its test method Oct 21, 2008 Issued
Array ( [id] => 4620417 [patent_doc_number] => 08000141 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-08-16 [patent_title] => 'Compensation for voltage drifts in analog memory cells' [patent_app_type] => utility [patent_app_number] => 12/251471 [patent_app_country] => US [patent_app_date] => 2008-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 8746 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/000/08000141.pdf [firstpage_image] =>[orig_patent_app_number] => 12251471 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/251471
Compensation for voltage drifts in analog memory cells Oct 14, 2008 Issued
Array ( [id] => 6470485 [patent_doc_number] => 20100091584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'MEMORY DEVICE AND METHODS THEREOF' [patent_app_type] => utility [patent_app_number] => 12/251509 [patent_app_country] => US [patent_app_date] => 2008-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20100091584.pdf [firstpage_image] =>[orig_patent_app_number] => 12251509 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/251509
Memory device and methods thereof Oct 14, 2008 Issued
Array ( [id] => 4503905 [patent_doc_number] => 07948810 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-05-24 [patent_title] => 'Positive and negative voltage level shifter circuit' [patent_app_type] => utility [patent_app_number] => 12/250021 [patent_app_country] => US [patent_app_date] => 2008-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 8035 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/948/07948810.pdf [firstpage_image] =>[orig_patent_app_number] => 12250021 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/250021
Positive and negative voltage level shifter circuit Oct 12, 2008 Issued
Array ( [id] => 5283663 [patent_doc_number] => 20090097337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'SEMICONDUCTOR STROAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/248561 [patent_app_country] => US [patent_app_date] => 2008-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6891 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20090097337.pdf [firstpage_image] =>[orig_patent_app_number] => 12248561 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/248561
SEMICONDUCTOR STROAGE DEVICE Oct 8, 2008 Abandoned
Array ( [id] => 6470523 [patent_doc_number] => 20100091588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'MEMORY DEVICE AND MEMORY SYSTEM COMPRISING A MEMORY DEVICE AND A MEMORY CONTROL DEVICE' [patent_app_type] => utility [patent_app_number] => 12/248759 [patent_app_country] => US [patent_app_date] => 2008-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7948 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20100091588.pdf [firstpage_image] =>[orig_patent_app_number] => 12248759 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/248759
Memory device and memory system comprising a memory device and a memory control device Oct 8, 2008 Issued
Array ( [id] => 5519961 [patent_doc_number] => 20090027942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'SEMICONDUCTOR MEMORY UNIT AND ARRAY' [patent_app_type] => utility [patent_app_number] => 12/245922 [patent_app_country] => US [patent_app_date] => 2008-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6419 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20090027942.pdf [firstpage_image] =>[orig_patent_app_number] => 12245922 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/245922
SEMICONDUCTOR MEMORY UNIT AND ARRAY Oct 5, 2008 Abandoned
Array ( [id] => 4537725 [patent_doc_number] => 07924631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Memory card and non-volatile memory controller thereof' [patent_app_type] => utility [patent_app_number] => 12/241057 [patent_app_country] => US [patent_app_date] => 2008-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5951 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/924/07924631.pdf [firstpage_image] =>[orig_patent_app_number] => 12241057 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/241057
Memory card and non-volatile memory controller thereof Sep 29, 2008 Issued
Array ( [id] => 5289256 [patent_doc_number] => 20090021986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'OPERATING METHOD OF NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/236999 [patent_app_country] => US [patent_app_date] => 2008-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6096 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20090021986.pdf [firstpage_image] =>[orig_patent_app_number] => 12236999 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/236999
OPERATING METHOD OF NON-VOLATILE MEMORY DEVICE Sep 23, 2008 Abandoned
Array ( [id] => 5307491 [patent_doc_number] => 20090014772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'EEPROM MEMORY CELL WITH FIRST-DOPANT-TYPE CONTROL GATE TRANSISTOR, AND SECOND-DOPANT TYPE PROGRAM/ERASE AND ACCESS TRANSISTORS FORMED IN COMMON WELL' [patent_app_type] => utility [patent_app_number] => 12/233294 [patent_app_country] => US [patent_app_date] => 2008-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7099 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20090014772.pdf [firstpage_image] =>[orig_patent_app_number] => 12233294 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/233294
EEPROM memory cell with first-dopant-type control gate transister, and second-dopant type program/erase and access transistors formed in common well Sep 17, 2008 Issued
Array ( [id] => 4564994 [patent_doc_number] => 07821833 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-26 [patent_title] => 'Semiconductor device and its control method' [patent_app_type] => utility [patent_app_number] => 12/283722 [patent_app_country] => US [patent_app_date] => 2008-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 27 [patent_no_of_words] => 8810 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/821/07821833.pdf [firstpage_image] =>[orig_patent_app_number] => 12283722 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/283722
Semiconductor device and its control method Sep 14, 2008 Issued
Array ( [id] => 104595 [patent_doc_number] => 07729170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'Semiconductor device and its control method' [patent_app_type] => utility [patent_app_number] => 12/283721 [patent_app_country] => US [patent_app_date] => 2008-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 27 [patent_no_of_words] => 8810 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/729/07729170.pdf [firstpage_image] =>[orig_patent_app_number] => 12283721 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/283721
Semiconductor device and its control method Sep 14, 2008 Issued
Array ( [id] => 7524023 [patent_doc_number] => 08027187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-27 [patent_title] => 'Memory sensing devices, methods, and systems' [patent_app_type] => utility [patent_app_number] => 12/209923 [patent_app_country] => US [patent_app_date] => 2008-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 13044 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/027/08027187.pdf [firstpage_image] =>[orig_patent_app_number] => 12209923 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/209923
Memory sensing devices, methods, and systems Sep 11, 2008 Issued
Array ( [id] => 4491932 [patent_doc_number] => 07903498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Y-decoder and decoding method thereof' [patent_app_type] => utility [patent_app_number] => 12/205279 [patent_app_country] => US [patent_app_date] => 2008-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4663 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/903/07903498.pdf [firstpage_image] =>[orig_patent_app_number] => 12205279 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/205279
Y-decoder and decoding method thereof Sep 4, 2008 Issued
Array ( [id] => 4531775 [patent_doc_number] => 07952939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-31 [patent_title] => 'Circuit and method for VDD-tracking CVDD voltage supply' [patent_app_type] => utility [patent_app_number] => 12/205243 [patent_app_country] => US [patent_app_date] => 2008-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4332 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/952/07952939.pdf [firstpage_image] =>[orig_patent_app_number] => 12205243 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/205243
Circuit and method for VDD-tracking CVDD voltage supply Sep 4, 2008 Issued
Array ( [id] => 7980081 [patent_doc_number] => 08072793 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-06 [patent_title] => 'High density resistance based semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/204515 [patent_app_country] => US [patent_app_date] => 2008-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6830 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/072/08072793.pdf [firstpage_image] =>[orig_patent_app_number] => 12204515 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/204515
High density resistance based semiconductor device Sep 3, 2008 Issued
Array ( [id] => 6616281 [patent_doc_number] => 20100034022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-11 [patent_title] => 'COMPENSATING FOR COUPLING DURING READ OPERATIONS IN NON-VOLATILE STORAGE' [patent_app_type] => utility [patent_app_number] => 12/188629 [patent_app_country] => US [patent_app_date] => 2008-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 18692 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20100034022.pdf [firstpage_image] =>[orig_patent_app_number] => 12188629 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/188629
Compensating for coupling during read operations in non-volatile storage Aug 7, 2008 Issued
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