Search

Kimberly Ballard

Examiner (ID: 1514, Phone: (571)272-2150 , Office: P/1649 )

Most Active Art Unit
1649
Art Unit(s)
1649
Total Applications
837
Issued Applications
382
Pending Applications
80
Abandoned Applications
375

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6117741 [patent_doc_number] => 20110075467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'Ferroelectric memory devices and operating methods thereof' [patent_app_type] => utility [patent_app_number] => 12/923131 [patent_app_country] => US [patent_app_date] => 2010-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7253 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20110075467.pdf [firstpage_image] =>[orig_patent_app_number] => 12923131 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923131
Ferroelectric memory devices and operating methods thereof Sep 2, 2010 Issued
Array ( [id] => 7789615 [patent_doc_number] => 20120051171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'CHANNEL SKEWING' [patent_app_type] => utility [patent_app_number] => 12/872913 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5739 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20120051171.pdf [firstpage_image] =>[orig_patent_app_number] => 12872913 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/872913
Channel skewing Aug 30, 2010 Issued
Array ( [id] => 8714660 [patent_doc_number] => 08400804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Memory devices having break cells' [patent_app_type] => utility [patent_app_number] => 12/870925 [patent_app_country] => US [patent_app_date] => 2010-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2996 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12870925 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/870925
Memory devices having break cells Aug 29, 2010 Issued
Array ( [id] => 6069237 [patent_doc_number] => 20110044086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'OPTICAL MEMORY DEVICE AND METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 12/859339 [patent_app_country] => US [patent_app_date] => 2010-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2681 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20110044086.pdf [firstpage_image] =>[orig_patent_app_number] => 12859339 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/859339
Optical memory device and method therefor Aug 18, 2010 Issued
Array ( [id] => 8847734 [patent_doc_number] => 08456924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Semiconductor memory device and method for operating the same' [patent_app_type] => utility [patent_app_number] => 12/856131 [patent_app_country] => US [patent_app_date] => 2010-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9410 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12856131 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/856131
Semiconductor memory device and method for operating the same Aug 12, 2010 Issued
Array ( [id] => 6374863 [patent_doc_number] => 20100315885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'CIRCUITS, DEVICES, SYSTEMS, AND METHODS OF OPERATION FOR CAPTURING DATA SIGNALS' [patent_app_type] => utility [patent_app_number] => 12/852325 [patent_app_country] => US [patent_app_date] => 2010-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6247 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20100315885.pdf [firstpage_image] =>[orig_patent_app_number] => 12852325 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/852325
Circuits, devices, systems, and methods of operation for capturing data signals Aug 5, 2010 Issued
Array ( [id] => 7752890 [patent_doc_number] => 20120026805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'SRAM BITCELL DATA RETENTION CONTROL FOR LEAKAGE OPTIMIZATION' [patent_app_type] => utility [patent_app_number] => 12/846129 [patent_app_country] => US [patent_app_date] => 2010-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3443 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20120026805.pdf [firstpage_image] =>[orig_patent_app_number] => 12846129 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/846129
SRAM bitcell data retention control for leakage optimization Jul 28, 2010 Issued
Array ( [id] => 6147833 [patent_doc_number] => 20110019470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/840567 [patent_app_country] => US [patent_app_date] => 2010-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 11293 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20110019470.pdf [firstpage_image] =>[orig_patent_app_number] => 12840567 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/840567
Nonvolatile semiconductor memory device Jul 20, 2010 Issued
Array ( [id] => 8573226 [patent_doc_number] => 08339879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Repair circuit and semiconductor apparatus including the same' [patent_app_type] => utility [patent_app_number] => 12/836443 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5942 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12836443 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/836443
Repair circuit and semiconductor apparatus including the same Jul 13, 2010 Issued
Array ( [id] => 6133134 [patent_doc_number] => 20110007579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'INTERNAL VOLTAGE GENERATOR' [patent_app_type] => utility [patent_app_number] => 12/835615 [patent_app_country] => US [patent_app_date] => 2010-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7081 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20110007579.pdf [firstpage_image] =>[orig_patent_app_number] => 12835615 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/835615
Internal voltage generator Jul 12, 2010 Issued
Array ( [id] => 8068219 [patent_doc_number] => 20110242917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/833819 [patent_app_country] => US [patent_app_date] => 2010-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8584 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20110242917.pdf [firstpage_image] =>[orig_patent_app_number] => 12833819 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/833819
Semiconductor memory device and method for operating the same Jul 8, 2010 Issued
Array ( [id] => 7707405 [patent_doc_number] => 20120001682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'APPARATUSES AND METHODS TO REDUCE POWER CONSUMPTION IN DIGITAL CIRCUITS' [patent_app_type] => utility [patent_app_number] => 12/830151 [patent_app_country] => US [patent_app_date] => 2010-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3397 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12830151 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/830151
Apparatuses and methods to reduce power consumption in digital circuits Jul 1, 2010 Issued
Array ( [id] => 6133140 [patent_doc_number] => 20110007584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/824505 [patent_app_country] => US [patent_app_date] => 2010-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8167 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20110007584.pdf [firstpage_image] =>[orig_patent_app_number] => 12824505 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/824505
Semiconductor device Jun 27, 2010 Issued
Array ( [id] => 6494885 [patent_doc_number] => 20100259988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-14 [patent_title] => 'OFFSET NON-VOLATILE STORAGE' [patent_app_type] => utility [patent_app_number] => 12/822546 [patent_app_country] => US [patent_app_date] => 2010-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6916 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20100259988.pdf [firstpage_image] =>[orig_patent_app_number] => 12822546 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/822546
Offset non-volatile storage Jun 23, 2010 Issued
Array ( [id] => 6093230 [patent_doc_number] => 20110002168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'Binary Logic Utilizing MEMS Devices' [patent_app_type] => utility [patent_app_number] => 12/818293 [patent_app_country] => US [patent_app_date] => 2010-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 20008 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20110002168.pdf [firstpage_image] =>[orig_patent_app_number] => 12818293 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/818293
Binary logic utilizing MEMS devices Jun 17, 2010 Issued
Array ( [id] => 8411410 [patent_doc_number] => 08274812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-25 [patent_title] => 'Write and erase scheme for resistive memory device' [patent_app_type] => utility [patent_app_number] => 12/815369 [patent_app_country] => US [patent_app_date] => 2010-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6550 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12815369 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/815369
Write and erase scheme for resistive memory device Jun 13, 2010 Issued
Array ( [id] => 4560032 [patent_doc_number] => 07961543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-14 [patent_title] => 'Semiconductor memory device and refresh control method' [patent_app_type] => utility [patent_app_number] => 12/813685 [patent_app_country] => US [patent_app_date] => 2010-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7020 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/961/07961543.pdf [firstpage_image] =>[orig_patent_app_number] => 12813685 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/813685
Semiconductor memory device and refresh control method Jun 10, 2010 Issued
Array ( [id] => 6201138 [patent_doc_number] => 20110063924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-17 [patent_title] => 'METHOD OF FLASH MEMORY DESIGN WITH DIFFERENTIAL CELL FOR BETTER ENDURANCE' [patent_app_type] => utility [patent_app_number] => 12/794697 [patent_app_country] => US [patent_app_date] => 2010-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20110063924.pdf [firstpage_image] =>[orig_patent_app_number] => 12794697 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/794697
Method of flash memory design with differential cell for better endurance Jun 3, 2010 Issued
Array ( [id] => 6072368 [patent_doc_number] => 20110046912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'Semiconductor Device having variable parameter selection based on temperature and test method' [patent_app_type] => utility [patent_app_number] => 12/793845 [patent_app_country] => US [patent_app_date] => 2010-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13545 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20110046912.pdf [firstpage_image] =>[orig_patent_app_number] => 12793845 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/793845
Semiconductor device having variable parameter selection based on temperature and test method Jun 3, 2010 Issued
Array ( [id] => 7578865 [patent_doc_number] => 20110292748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'IMPLEMENTING LOW POWER DATA PREDICTING LOCAL EVALUATION FOR DOUBLE PUMPED ARRAYS' [patent_app_type] => utility [patent_app_number] => 12/788411 [patent_app_country] => US [patent_app_date] => 2010-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3105 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0292/20110292748.pdf [firstpage_image] =>[orig_patent_app_number] => 12788411 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/788411
Implementing low power data predicting local evaluation for double pumped arrays May 26, 2010 Issued
Menu