Search

Kimberly Ballard

Examiner (ID: 1514, Phone: (571)272-2150 , Office: P/1649 )

Most Active Art Unit
1649
Art Unit(s)
1649
Total Applications
837
Issued Applications
382
Pending Applications
80
Abandoned Applications
375

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7802282 [patent_doc_number] => 08130558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'System and method for level shifter' [patent_app_type] => utility [patent_app_number] => 12/367249 [patent_app_country] => US [patent_app_date] => 2009-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3698 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/130/08130558.pdf [firstpage_image] =>[orig_patent_app_number] => 12367249 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/367249
System and method for level shifter Feb 5, 2009 Issued
Array ( [id] => 5526035 [patent_doc_number] => 20090196112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'Block decoding circuits of semiconductor memory devices and methods of operating the same' [patent_app_type] => utility [patent_app_number] => 12/320625 [patent_app_country] => US [patent_app_date] => 2009-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5139 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20090196112.pdf [firstpage_image] =>[orig_patent_app_number] => 12320625 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/320625
Block decoding circuits of semiconductor memory devices and methods of operating the same Jan 29, 2009 Issued
Array ( [id] => 7777294 [patent_doc_number] => 08120977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Test method for nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 12/362441 [patent_app_country] => US [patent_app_date] => 2009-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2567 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/120/08120977.pdf [firstpage_image] =>[orig_patent_app_number] => 12362441 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/362441
Test method for nonvolatile memory device Jan 28, 2009 Issued
Array ( [id] => 5526037 [patent_doc_number] => 20090196114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'Semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 12/320323 [patent_app_country] => US [patent_app_date] => 2009-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7227 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20090196114.pdf [firstpage_image] =>[orig_patent_app_number] => 12320323 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/320323
Semiconductor storage device Jan 22, 2009 Issued
Array ( [id] => 5408714 [patent_doc_number] => 20090122612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'WIRED-OR TYPED PAGE BUFFER HAVING CACHE FUNCTION IN A NONVOLATILE MEMORY DEVICE AND RELATED METHOD OF PROGRAMMING' [patent_app_type] => utility [patent_app_number] => 12/354915 [patent_app_country] => US [patent_app_date] => 2009-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6302 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20090122612.pdf [firstpage_image] =>[orig_patent_app_number] => 12354915 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/354915
Wired-or typed page buffer having cache function in a nonvolatile memory device and related method of programming Jan 15, 2009 Issued
Array ( [id] => 125581 [patent_doc_number] => 07706208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-27 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/354549 [patent_app_country] => US [patent_app_date] => 2009-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 66 [patent_no_of_words] => 20573 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/706/07706208.pdf [firstpage_image] =>[orig_patent_app_number] => 12354549 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/354549
Semiconductor memory device Jan 14, 2009 Issued
Array ( [id] => 5526024 [patent_doc_number] => 20090196101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'MEMORY MODULE' [patent_app_type] => utility [patent_app_number] => 12/351005 [patent_app_country] => US [patent_app_date] => 2009-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6127 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20090196101.pdf [firstpage_image] =>[orig_patent_app_number] => 12351005 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/351005
Memory module Jan 8, 2009 Issued
Array ( [id] => 5341660 [patent_doc_number] => 20090180310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'RESISTANCE CHANGE TYPE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/350477 [patent_app_country] => US [patent_app_date] => 2009-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 14981 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20090180310.pdf [firstpage_image] =>[orig_patent_app_number] => 12350477 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/350477
Resistance change type memory Jan 7, 2009 Issued
Array ( [id] => 6618273 [patent_doc_number] => 20100172187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-08 [patent_title] => 'ROBUST SENSING CIRCUIT AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/349417 [patent_app_country] => US [patent_app_date] => 2009-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8824 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20100172187.pdf [firstpage_image] =>[orig_patent_app_number] => 12349417 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/349417
Robust sensing circuit and method Jan 5, 2009 Issued
Array ( [id] => 8191893 [patent_doc_number] => 08184485 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-22 [patent_title] => 'Semiconductor device having coupling elimination circuit' [patent_app_type] => utility [patent_app_number] => 12/318581 [patent_app_country] => US [patent_app_date] => 2008-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4126 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/184/08184485.pdf [firstpage_image] =>[orig_patent_app_number] => 12318581 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/318581
Semiconductor device having coupling elimination circuit Dec 30, 2008 Issued
Array ( [id] => 6403533 [patent_doc_number] => 20100165714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'METHOD OF STORING AN INDICATION OF WHETHER A MEMORY LOCATION IN PHASE CHANGE MEMORY NEEDS PROGRAMMING' [patent_app_type] => utility [patent_app_number] => 12/346459 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6288 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0165/20100165714.pdf [firstpage_image] =>[orig_patent_app_number] => 12346459 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346459
Method of storing an indication of whether a memory location in phase change memory needs programming Dec 29, 2008 Issued
Array ( [id] => 4630581 [patent_doc_number] => 08009486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-30 [patent_title] => 'Semiconductor integrated circuit for generating clock signals' [patent_app_type] => utility [patent_app_number] => 12/345783 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4946 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/009/08009486.pdf [firstpage_image] =>[orig_patent_app_number] => 12345783 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345783
Semiconductor integrated circuit for generating clock signals Dec 29, 2008 Issued
Array ( [id] => 5463242 [patent_doc_number] => 20090323442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND RESET CONTROL CIRCUIT OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/345807 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4379 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0323/20090323442.pdf [firstpage_image] =>[orig_patent_app_number] => 12345807 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345807
Semiconductor memory device and reset control circuit of the same Dec 29, 2008 Issued
Array ( [id] => 5500748 [patent_doc_number] => 20090161436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/335093 [patent_app_country] => US [patent_app_date] => 2008-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10595 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20090161436.pdf [firstpage_image] =>[orig_patent_app_number] => 12335093 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/335093
Semiconductor memory device Dec 14, 2008 Issued
Array ( [id] => 5440358 [patent_doc_number] => 20090091997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-09 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE SUITABLE FOR MOUNTING ON PORTABLE TERMINAL' [patent_app_type] => utility [patent_app_number] => 12/333913 [patent_app_country] => US [patent_app_date] => 2008-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 50 [patent_no_of_words] => 25958 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20090091997.pdf [firstpage_image] =>[orig_patent_app_number] => 12333913 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333913
Semiconductor memory device suitable for mounting on portable terminal Dec 11, 2008 Issued
Array ( [id] => 4582014 [patent_doc_number] => 07859934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Method and apparatus for redundant memory configuration in voltage island' [patent_app_type] => utility [patent_app_number] => 12/330936 [patent_app_country] => US [patent_app_date] => 2008-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4841 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/859/07859934.pdf [firstpage_image] =>[orig_patent_app_number] => 12330936 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/330936
Method and apparatus for redundant memory configuration in voltage island Dec 8, 2008 Issued
Array ( [id] => 7596644 [patent_doc_number] => 07619938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-17 [patent_title] => 'Repairing advanced-memory buffer (AMB) with redundant memory buffer for repairing DRAM on a fully-buffered memory-module' [patent_app_type] => utility [patent_app_number] => 12/275957 [patent_app_country] => US [patent_app_date] => 2008-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5806 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/619/07619938.pdf [firstpage_image] =>[orig_patent_app_number] => 12275957 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/275957
Repairing advanced-memory buffer (AMB) with redundant memory buffer for repairing DRAM on a fully-buffered memory-module Nov 20, 2008 Issued
Array ( [id] => 5390355 [patent_doc_number] => 20090207668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'DATA STROBE CLOCK BUFFER IN SEMICONDUCTOR MEMORY APPARATUS, METHOD OF CONTROLLING THE SAME, AND SEMICONDUCTOR APPARATUS HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/266265 [patent_app_country] => US [patent_app_date] => 2008-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4356 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20090207668.pdf [firstpage_image] =>[orig_patent_app_number] => 12266265 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/266265
Data strobe clock buffer in semiconductor memory apparatus, method of controlling the same, and semiconductor apparatus having the same Nov 5, 2008 Issued
Array ( [id] => 6310115 [patent_doc_number] => 20100110789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'MEMORY DEVICE BIASING METHOD AND APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/265989 [patent_app_country] => US [patent_app_date] => 2008-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6205 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20100110789.pdf [firstpage_image] =>[orig_patent_app_number] => 12265989 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/265989
Memory device biasing method and apparatus Nov 5, 2008 Issued
Array ( [id] => 5513346 [patent_doc_number] => 20090213652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'PROGRAMMING METHOD FOR NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/264353 [patent_app_country] => US [patent_app_date] => 2008-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 5723 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20090213652.pdf [firstpage_image] =>[orig_patent_app_number] => 12264353 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/264353
Programming method for non-volatile memory device Nov 3, 2008 Issued
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