Search

Kimberly N. Mclean Mayo

Examiner (ID: 12031)

Most Active Art Unit
2187
Art Unit(s)
2185, 2187, 2751
Total Applications
382
Issued Applications
339
Pending Applications
11
Abandoned Applications
32

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6844482 [patent_doc_number] => 20030149829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Implicit addressing sequential media drive with intervening converter simulating explicit addressing to host applications' [patent_app_type] => new [patent_app_number] => 10/071807 [patent_app_country] => US [patent_app_date] => 2002-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4404 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20030149829.pdf [firstpage_image] =>[orig_patent_app_number] => 10071807 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/071807
Implicit addressing sequential media drive with intervening converter simulating explicit addressing to host applications Feb 5, 2002 Issued
Array ( [id] => 619674 [patent_doc_number] => 07146453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-05 [patent_title] => 'Reducing ABENDS through the use of second-tier storage groups' [patent_app_type] => utility [patent_app_number] => 10/072521 [patent_app_country] => US [patent_app_date] => 2002-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1878 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/146/07146453.pdf [firstpage_image] =>[orig_patent_app_number] => 10072521 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/072521
Reducing ABENDS through the use of second-tier storage groups Feb 5, 2002 Issued
Array ( [id] => 1179097 [patent_doc_number] => 06757800 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-29 [patent_title] => 'Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices' [patent_app_type] => B1 [patent_app_number] => 10/071972 [patent_app_country] => US [patent_app_date] => 2002-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 13547 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/757/06757800.pdf [firstpage_image] =>[orig_patent_app_number] => 10071972 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/071972
Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices Feb 4, 2002 Issued
Array ( [id] => 6294274 [patent_doc_number] => 20020056021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-09 [patent_title] => 'Method and apparatus for coupling signals across different clock domains, and memory device and computer system using same' [patent_app_type] => new [patent_app_number] => 10/038393 [patent_app_country] => US [patent_app_date] => 2002-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7714 [patent_no_of_claims] => 86 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20020056021.pdf [firstpage_image] =>[orig_patent_app_number] => 10038393 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038393
Method and apparatus for coupling signals across different clock domains, and memory device and computer system using same Jan 1, 2002 Issued
Array ( [id] => 526701 [patent_doc_number] => 07200720 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-04-03 [patent_title] => 'System and method for efficiently performing memory intensive computations including a bidirectional synchronization mechanism for maintaining consistency of data' [patent_app_type] => utility [patent_app_number] => 10/041033 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6287 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/200/07200720.pdf [firstpage_image] =>[orig_patent_app_number] => 10041033 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/041033
System and method for efficiently performing memory intensive computations including a bidirectional synchronization mechanism for maintaining consistency of data Dec 27, 2001 Issued
Array ( [id] => 6294318 [patent_doc_number] => 20020056027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-09 [patent_title] => 'Information processing system' [patent_app_type] => new [patent_app_number] => 10/025743 [patent_app_country] => US [patent_app_date] => 2001-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7557 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20020056027.pdf [firstpage_image] =>[orig_patent_app_number] => 10025743 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/025743
Information processing system Dec 25, 2001 Abandoned
Array ( [id] => 1039987 [patent_doc_number] => 06874059 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-29 [patent_title] => 'System and method for using anonymous tokens for efficient memory management' [patent_app_type] => utility [patent_app_number] => 09/992828 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5103 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/874/06874059.pdf [firstpage_image] =>[orig_patent_app_number] => 09992828 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/992828
System and method for using anonymous tokens for efficient memory management Nov 13, 2001 Issued
Array ( [id] => 1181132 [patent_doc_number] => 06754800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-22 [patent_title] => 'Methods and apparatus for implementing host-based object storage schemes' [patent_app_type] => B2 [patent_app_number] => 09/987249 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4896 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/754/06754800.pdf [firstpage_image] =>[orig_patent_app_number] => 09987249 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/987249
Methods and apparatus for implementing host-based object storage schemes Nov 13, 2001 Issued
Array ( [id] => 6802359 [patent_doc_number] => 20030097524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'System, apparatus and method provding adaptive write policy for disk array controllers' [patent_app_type] => new [patent_app_number] => 09/993235 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6796 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20030097524.pdf [firstpage_image] =>[orig_patent_app_number] => 09993235 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/993235
System, apparatus and method providing adaptive write policy for disk array controllers Nov 13, 2001 Issued
Array ( [id] => 1052607 [patent_doc_number] => 06862673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-01 [patent_title] => 'Command order maintenance scheme for multi-in/multi-out FIFO in multi-threaded I/O links' [patent_app_type] => utility [patent_app_number] => 10/003168 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 3809 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862673.pdf [firstpage_image] =>[orig_patent_app_number] => 10003168 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/003168
Command order maintenance scheme for multi-in/multi-out FIFO in multi-threaded I/O links Nov 13, 2001 Issued
Array ( [id] => 856247 [patent_doc_number] => 07380085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-27 [patent_title] => 'Memory adapted to provide dedicated and or shared memory to multiple processors and method therefor' [patent_app_type] => utility [patent_app_number] => 10/003170 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2939 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/380/07380085.pdf [firstpage_image] =>[orig_patent_app_number] => 10003170 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/003170
Memory adapted to provide dedicated and or shared memory to multiple processors and method therefor Nov 13, 2001 Issued
Array ( [id] => 1291769 [patent_doc_number] => 06643732 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Delayed read/write scheme for SRAM interface compatible DRAM' [patent_app_type] => B1 [patent_app_number] => 09/992519 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3431 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643732.pdf [firstpage_image] =>[orig_patent_app_number] => 09992519 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/992519
Delayed read/write scheme for SRAM interface compatible DRAM Nov 13, 2001 Issued
Array ( [id] => 6698163 [patent_doc_number] => 20030110357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Weight based disk cache replacement method' [patent_app_type] => new [patent_app_number] => 10/003194 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7602 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20030110357.pdf [firstpage_image] =>[orig_patent_app_number] => 10003194 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/003194
Weight based disk cache replacement method Nov 13, 2001 Abandoned
Array ( [id] => 662973 [patent_doc_number] => 07107430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Mechanism to reduce the cost of forwarding pointer aliasing' [patent_app_type] => utility [patent_app_number] => 09/990798 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 3940 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/107/07107430.pdf [firstpage_image] =>[orig_patent_app_number] => 09990798 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/990798
Mechanism to reduce the cost of forwarding pointer aliasing Nov 13, 2001 Issued
Array ( [id] => 6369318 [patent_doc_number] => 20020059497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Data storage control method, data storage control apparatus, and storage medium storing data storage control program' [patent_app_type] => new [patent_app_number] => 09/992074 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7388 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20020059497.pdf [firstpage_image] =>[orig_patent_app_number] => 09992074 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/992074
Data storage control method, data storage control apparatus, and storage medium storing data storage control program Nov 13, 2001 Abandoned
Array ( [id] => 7611338 [patent_doc_number] => 06904504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'Method and apparatus for software selection of protected register settings' [patent_app_type] => utility [patent_app_number] => 09/991128 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3433 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/904/06904504.pdf [firstpage_image] =>[orig_patent_app_number] => 09991128 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/991128
Method and apparatus for software selection of protected register settings Nov 13, 2001 Issued
Array ( [id] => 965671 [patent_doc_number] => 06950910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-27 [patent_title] => 'Mobile wireless communication device architectures and methods therefor' [patent_app_type] => utility [patent_app_number] => 10/008939 [patent_app_country] => US [patent_app_date] => 2001-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1960 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/950/06950910.pdf [firstpage_image] =>[orig_patent_app_number] => 10008939 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/008939
Mobile wireless communication device architectures and methods therefor Nov 7, 2001 Issued
Array ( [id] => 6659628 [patent_doc_number] => 20030079097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Optical navigation sensor with shadow memory' [patent_app_type] => new [patent_app_number] => 10/053993 [patent_app_country] => US [patent_app_date] => 2001-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3942 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20030079097.pdf [firstpage_image] =>[orig_patent_app_number] => 10053993 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/053993
Optical navigation sensor with shadow memory Oct 21, 2001 Abandoned
Array ( [id] => 1037125 [patent_doc_number] => 06877068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-05 [patent_title] => 'Method and device for prefetching a referenced resource' [patent_app_type] => utility [patent_app_number] => 10/082872 [patent_app_country] => US [patent_app_date] => 2001-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2259 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/877/06877068.pdf [firstpage_image] =>[orig_patent_app_number] => 10082872 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/082872
Method and device for prefetching a referenced resource Oct 18, 2001 Issued
Array ( [id] => 7633081 [patent_doc_number] => 06658539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-02 [patent_title] => 'Super-coherent data mechanisms for shared caches in a multiprocessing system' [patent_app_type] => B2 [patent_app_number] => 09/978353 [patent_app_country] => US [patent_app_date] => 2001-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 12354 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/658/06658539.pdf [firstpage_image] =>[orig_patent_app_number] => 09978353 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/978353
Super-coherent data mechanisms for shared caches in a multiprocessing system Oct 15, 2001 Issued
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