
Kin Chan Chen
Examiner (ID: 4953)
| Most Active Art Unit | 1765 |
| Art Unit(s) | 1792, 1765 |
| Total Applications | 758 |
| Issued Applications | 583 |
| Pending Applications | 32 |
| Abandoned Applications | 143 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7344348
[patent_doc_number] => 20040192051
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-30
[patent_title] => 'Method of forming a damascene structure'
[patent_app_type] => new
[patent_app_number] => 10/699157
[patent_app_country] => US
[patent_app_date] => 2003-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 5925
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0192/20040192051.pdf
[firstpage_image] =>[orig_patent_app_number] => 10699157
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/699157 | Method of forming a damascene structure | Oct 29, 2003 | Abandoned |
Array
(
[id] => 7215217
[patent_doc_number] => 20050076581
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-14
[patent_title] => 'Particulate or particle-bound chelating agents'
[patent_app_type] => utility
[patent_app_number] => 10/690626
[patent_app_country] => US
[patent_app_date] => 2003-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10120
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0076/20050076581.pdf
[firstpage_image] =>[orig_patent_app_number] => 10690626
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/690626 | Particulate or particle-bound chelating agents | Oct 22, 2003 | Issued |
Array
(
[id] => 7296598
[patent_doc_number] => 20040214443
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-28
[patent_title] => 'Silane containing polishing composition for CMP'
[patent_app_type] => new
[patent_app_number] => 10/691254
[patent_app_country] => US
[patent_app_date] => 2003-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3965
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0214/20040214443.pdf
[firstpage_image] =>[orig_patent_app_number] => 10691254
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/691254 | Silane containing polishing composition for CMP | Oct 21, 2003 | Abandoned |
Array
(
[id] => 314801
[patent_doc_number] => 07524771
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-28
[patent_title] => 'Substrate processing method using alkaline solution and acid solution'
[patent_app_type] => utility
[patent_app_number] => 10/690912
[patent_app_country] => US
[patent_app_date] => 2003-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 35
[patent_no_of_words] => 21897
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/524/07524771.pdf
[firstpage_image] =>[orig_patent_app_number] => 10690912
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/690912 | Substrate processing method using alkaline solution and acid solution | Oct 21, 2003 | Issued |
Array
(
[id] => 7162120
[patent_doc_number] => 20050085091
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-21
[patent_title] => 'Wafer etching techniques'
[patent_app_type] => utility
[patent_app_number] => 10/688238
[patent_app_country] => US
[patent_app_date] => 2003-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3376
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0085/20050085091.pdf
[firstpage_image] =>[orig_patent_app_number] => 10688238
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/688238 | Wafer etching techniques | Oct 17, 2003 | Issued |
Array
(
[id] => 7162095
[patent_doc_number] => 20050085084
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-21
[patent_title] => 'Method of fabricating copper metallization on backside of gallium arsenide devices'
[patent_app_type] => utility
[patent_app_number] => 10/685600
[patent_app_country] => US
[patent_app_date] => 2003-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2482
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0085/20050085084.pdf
[firstpage_image] =>[orig_patent_app_number] => 10685600
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/685600 | Method of fabricating copper metallization on backside of gallium arsenide devices | Oct 15, 2003 | Abandoned |
Array
(
[id] => 773543
[patent_doc_number] => 07001847
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-21
[patent_title] => 'Micro pattern forming method and semiconductor device manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 10/685790
[patent_app_country] => US
[patent_app_date] => 2003-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 22
[patent_no_of_words] => 4477
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 313
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/001/07001847.pdf
[firstpage_image] =>[orig_patent_app_number] => 10685790
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/685790 | Micro pattern forming method and semiconductor device manufacturing method | Oct 15, 2003 | Issued |
Array
(
[id] => 7162091
[patent_doc_number] => 20050085081
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-21
[patent_title] => 'Process integration of SOI FETs with active layer spacer'
[patent_app_type] => utility
[patent_app_number] => 10/687424
[patent_app_country] => US
[patent_app_date] => 2003-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3123
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0085/20050085081.pdf
[firstpage_image] =>[orig_patent_app_number] => 10687424
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/687424 | Process integration of SOI FETs with active layer spacer | Oct 15, 2003 | Issued |
Array
(
[id] => 7309337
[patent_doc_number] => 20040142565
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-22
[patent_title] => 'Single and multilevel rework'
[patent_app_type] => new
[patent_app_number] => 10/687294
[patent_app_country] => US
[patent_app_date] => 2003-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8883
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0142/20040142565.pdf
[firstpage_image] =>[orig_patent_app_number] => 10687294
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/687294 | Single and multilevel rework | Oct 15, 2003 | Issued |
Array
(
[id] => 7605410
[patent_doc_number] => 07115519
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-03
[patent_title] => 'Method for plasma treatment'
[patent_app_type] => utility
[patent_app_number] => 10/684502
[patent_app_country] => US
[patent_app_date] => 2003-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3676
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/115/07115519.pdf
[firstpage_image] =>[orig_patent_app_number] => 10684502
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/684502 | Method for plasma treatment | Oct 14, 2003 | Issued |
Array
(
[id] => 7204231
[patent_doc_number] => 20040087159
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-05-06
[patent_title] => 'Method for manufacturing multi-thickness gate dielectric layer of semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/685738
[patent_app_country] => US
[patent_app_date] => 2003-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5660
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0087/20040087159.pdf
[firstpage_image] =>[orig_patent_app_number] => 10685738
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/685738 | Method for manufacturing multi-thickness gate dielectric layer of semiconductor device | Oct 14, 2003 | Issued |
Array
(
[id] => 679847
[patent_doc_number] => 07084073
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-01
[patent_title] => 'Method of forming a via hole through a glass wafer'
[patent_app_type] => utility
[patent_app_number] => 10/681217
[patent_app_country] => US
[patent_app_date] => 2003-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 2013
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/084/07084073.pdf
[firstpage_image] =>[orig_patent_app_number] => 10681217
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/681217 | Method of forming a via hole through a glass wafer | Oct 8, 2003 | Issued |
Array
(
[id] => 7222044
[patent_doc_number] => 20040072431
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-15
[patent_title] => 'Method for fabricating semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/679377
[patent_app_country] => US
[patent_app_date] => 2003-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1786
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0072/20040072431.pdf
[firstpage_image] =>[orig_patent_app_number] => 10679377
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/679377 | Method for reducing contact resistance of a semiconductor device | Oct 6, 2003 | Issued |
Array
(
[id] => 411614
[patent_doc_number] => 07282452
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-10-16
[patent_title] => 'Etching method, semiconductor and fabricating method for the same'
[patent_app_type] => utility
[patent_app_number] => 10/679464
[patent_app_country] => US
[patent_app_date] => 2003-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 59
[patent_no_of_words] => 22445
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/282/07282452.pdf
[firstpage_image] =>[orig_patent_app_number] => 10679464
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/679464 | Etching method, semiconductor and fabricating method for the same | Oct 6, 2003 | Issued |
Array
(
[id] => 7253036
[patent_doc_number] => 20050074981
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-07
[patent_title] => 'Increasing the etch resistance of photoresists'
[patent_app_type] => utility
[patent_app_number] => 10/679793
[patent_app_country] => US
[patent_app_date] => 2003-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1462
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0074/20050074981.pdf
[firstpage_image] =>[orig_patent_app_number] => 10679793
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/679793 | Increasing the etch resistance of photoresists | Oct 5, 2003 | Abandoned |
Array
(
[id] => 7289849
[patent_doc_number] => 20040110376
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-10
[patent_title] => 'Method of manufacturing semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/678994
[patent_app_country] => US
[patent_app_date] => 2003-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6038
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0110/20040110376.pdf
[firstpage_image] =>[orig_patent_app_number] => 10678994
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/678994 | Method of manufacturing semiconductor device including etching a conductive layer by using a gas including SiCl4 and NF3 | Oct 2, 2003 | Issued |
Array
(
[id] => 732783
[patent_doc_number] => 07037844
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-02
[patent_title] => 'Method for manufacturing a housing for a chip having a micromechanical structure'
[patent_app_type] => utility
[patent_app_number] => 10/679170
[patent_app_country] => US
[patent_app_date] => 2003-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 16
[patent_no_of_words] => 3969
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/037/07037844.pdf
[firstpage_image] =>[orig_patent_app_number] => 10679170
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/679170 | Method for manufacturing a housing for a chip having a micromechanical structure | Oct 1, 2003 | Issued |
Array
(
[id] => 732798
[patent_doc_number] => 07037854
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-02
[patent_title] => 'Method for chemical-mechanical jet etching of semiconductor structures'
[patent_app_type] => utility
[patent_app_number] => 10/675031
[patent_app_country] => US
[patent_app_date] => 2003-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4512
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/037/07037854.pdf
[firstpage_image] =>[orig_patent_app_number] => 10675031
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/675031 | Method for chemical-mechanical jet etching of semiconductor structures | Sep 29, 2003 | Issued |
Array
(
[id] => 7324265
[patent_doc_number] => 20040137728
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-15
[patent_title] => 'Air gap formation'
[patent_app_type] => new
[patent_app_number] => 10/661051
[patent_app_country] => US
[patent_app_date] => 2003-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 11522
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0137/20040137728.pdf
[firstpage_image] =>[orig_patent_app_number] => 10661051
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/661051 | Air gap formation | Sep 12, 2003 | Issued |
Array
(
[id] => 720024
[patent_doc_number] => 07049245
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-23
[patent_title] => 'Two-step GC etch for GC profile and process window improvement'
[patent_app_type] => utility
[patent_app_number] => 10/660821
[patent_app_country] => US
[patent_app_date] => 2003-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 11
[patent_no_of_words] => 1933
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/049/07049245.pdf
[firstpage_image] =>[orig_patent_app_number] => 10660821
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/660821 | Two-step GC etch for GC profile and process window improvement | Sep 11, 2003 | Issued |