Search

Kin Chan Chen

Examiner (ID: 4953)

Most Active Art Unit
1765
Art Unit(s)
1792, 1765
Total Applications
758
Issued Applications
583
Pending Applications
32
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7597680 [patent_doc_number] => 07618897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-17 [patent_title] => 'Alkali etching liquid for silicon wafer and etching method using same' [patent_app_type] => utility [patent_app_number] => 11/296254 [patent_app_country] => US [patent_app_date] => 2005-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4748 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/618/07618897.pdf [firstpage_image] =>[orig_patent_app_number] => 11296254 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/296254
Alkali etching liquid for silicon wafer and etching method using same Dec 7, 2005 Issued
Array ( [id] => 5745402 [patent_doc_number] => 20060108326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Polishing composition and method for high silicon nitride to silicon oxide removal rate ratios' [patent_app_type] => utility [patent_app_number] => 11/294853 [patent_app_country] => US [patent_app_date] => 2005-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7472 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20060108326.pdf [firstpage_image] =>[orig_patent_app_number] => 11294853 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/294853
Polishing composition and method for high silicon nitride to silicon oxide removal rate ratios Dec 5, 2005 Issued
Array ( [id] => 5837862 [patent_doc_number] => 20060118520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Plasma etching method' [patent_app_type] => utility [patent_app_number] => 11/290481 [patent_app_country] => US [patent_app_date] => 2005-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6284 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20060118520.pdf [firstpage_image] =>[orig_patent_app_number] => 11290481 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/290481
Plasma etching method Nov 30, 2005 Issued
Array ( [id] => 5191655 [patent_doc_number] => 20070080136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Etching method and etching equipment' [patent_app_type] => utility [patent_app_number] => 11/288105 [patent_app_country] => US [patent_app_date] => 2005-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3762 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20070080136.pdf [firstpage_image] =>[orig_patent_app_number] => 11288105 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/288105
Etching method and etching equipment Nov 28, 2005 Abandoned
Array ( [id] => 5779817 [patent_doc_number] => 20060201912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Method for reducing linewidth and size of metal, semiconductor or insulator patterns' [patent_app_type] => utility [patent_app_number] => 11/281401 [patent_app_country] => US [patent_app_date] => 2005-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2392 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20060201912.pdf [firstpage_image] =>[orig_patent_app_number] => 11281401 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/281401
Method for reducing linewidth and size of metal, semiconductor or insulator patterns Nov 17, 2005 Abandoned
Array ( [id] => 432284 [patent_doc_number] => 07265057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-04 [patent_title] => '3D lithography with laser beam writer for making hybrid surfaces' [patent_app_type] => utility [patent_app_number] => 11/282884 [patent_app_country] => US [patent_app_date] => 2005-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5062 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/265/07265057.pdf [firstpage_image] =>[orig_patent_app_number] => 11282884 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/282884
3D lithography with laser beam writer for making hybrid surfaces Nov 17, 2005 Issued
Array ( [id] => 5837863 [patent_doc_number] => 20060118521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Method for etching doughnut-type glass substrates' [patent_app_type] => utility [patent_app_number] => 11/274303 [patent_app_country] => US [patent_app_date] => 2005-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5544 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20060118521.pdf [firstpage_image] =>[orig_patent_app_number] => 11274303 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/274303
Method for etching doughnut-type glass substrates Nov 15, 2005 Issued
Array ( [id] => 5745401 [patent_doc_number] => 20060108325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Polishing process for producing damage free surfaces on semi-insulating silicon carbide wafers' [patent_app_type] => utility [patent_app_number] => 11/271737 [patent_app_country] => US [patent_app_date] => 2005-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8452 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20060108325.pdf [firstpage_image] =>[orig_patent_app_number] => 11271737 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/271737
Polishing process for producing damage free surfaces on semi-insulating silicon carbide wafers Nov 13, 2005 Abandoned
Array ( [id] => 820560 [patent_doc_number] => 07407891 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Method and apparatus for leveling a semiconductor wafer, and semiconductor wafer with improved flatness' [patent_app_type] => utility [patent_app_number] => 11/268356 [patent_app_country] => US [patent_app_date] => 2005-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 8410 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/407/07407891.pdf [firstpage_image] =>[orig_patent_app_number] => 11268356 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/268356
Method and apparatus for leveling a semiconductor wafer, and semiconductor wafer with improved flatness Nov 6, 2005 Issued
Array ( [id] => 5034588 [patent_doc_number] => 20070099127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Compact integrated capacitor' [patent_app_type] => utility [patent_app_number] => 11/266453 [patent_app_country] => US [patent_app_date] => 2005-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2316 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20070099127.pdf [firstpage_image] =>[orig_patent_app_number] => 11266453 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/266453
Compact integrated capacitor Nov 2, 2005 Abandoned
Array ( [id] => 830158 [patent_doc_number] => 07399712 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-15 [patent_title] => 'Method for etching organic hardmasks' [patent_app_type] => utility [patent_app_number] => 11/263148 [patent_app_country] => US [patent_app_date] => 2005-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3765 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/399/07399712.pdf [firstpage_image] =>[orig_patent_app_number] => 11263148 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/263148
Method for etching organic hardmasks Oct 30, 2005 Issued
Array ( [id] => 432282 [patent_doc_number] => 07265055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-04 [patent_title] => 'CMP of copper/ruthenium substrates' [patent_app_type] => utility [patent_app_number] => 11/259645 [patent_app_country] => US [patent_app_date] => 2005-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7747 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/265/07265055.pdf [firstpage_image] =>[orig_patent_app_number] => 11259645 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/259645
CMP of copper/ruthenium substrates Oct 25, 2005 Issued
Array ( [id] => 840424 [patent_doc_number] => 07390752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-24 [patent_title] => 'Self-aligning patterning method' [patent_app_type] => utility [patent_app_number] => 11/253756 [patent_app_country] => US [patent_app_date] => 2005-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 6271 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/390/07390752.pdf [firstpage_image] =>[orig_patent_app_number] => 11253756 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/253756
Self-aligning patterning method Oct 19, 2005 Issued
Array ( [id] => 5723833 [patent_doc_number] => 20060054593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Barrier metal film production apparatus, barrier metal film production method, metal film production method, and metal film production apparatus' [patent_app_type] => utility [patent_app_number] => 11/252811 [patent_app_country] => US [patent_app_date] => 2005-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 41897 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20060054593.pdf [firstpage_image] =>[orig_patent_app_number] => 11252811 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/252811
Barrier metal film production apparatus, barrier metal film production method, metal film production method, and metal film production apparatus Oct 18, 2005 Abandoned
Array ( [id] => 4983015 [patent_doc_number] => 20070087573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-19 [patent_title] => 'Pre-treatment method for physical vapor deposition of metal layer and method of forming metal silicide layer' [patent_app_type] => utility [patent_app_number] => 11/255420 [patent_app_country] => US [patent_app_date] => 2005-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2108 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20070087573.pdf [firstpage_image] =>[orig_patent_app_number] => 11255420 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/255420
Pre-treatment method for physical vapor deposition of metal layer and method of forming metal silicide layer Oct 18, 2005 Abandoned
Array ( [id] => 478602 [patent_doc_number] => 07223700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-29 [patent_title] => 'Method for fabricating fine features by jet-printing and surface treatment' [patent_app_type] => utility [patent_app_number] => 11/251525 [patent_app_country] => US [patent_app_date] => 2005-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5196 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/223/07223700.pdf [firstpage_image] =>[orig_patent_app_number] => 11251525 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/251525
Method for fabricating fine features by jet-printing and surface treatment Oct 13, 2005 Issued
Array ( [id] => 5194011 [patent_doc_number] => 20070082495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Semiconductor device having nano-pillars and method therefor' [patent_app_type] => utility [patent_app_number] => 11/244516 [patent_app_country] => US [patent_app_date] => 2005-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3188 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20070082495.pdf [firstpage_image] =>[orig_patent_app_number] => 11244516 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/244516
Semiconductor device having nano-pillars and method therefor Oct 5, 2005 Issued
Array ( [id] => 5054005 [patent_doc_number] => 20070056926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Process and system for etching doped silicon using SF6-based chemistry' [patent_app_type] => utility [patent_app_number] => 11/225891 [patent_app_country] => US [patent_app_date] => 2005-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5188 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20070056926.pdf [firstpage_image] =>[orig_patent_app_number] => 11225891 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/225891
Process and system for etching doped silicon using SF6-based chemistry Sep 13, 2005 Issued
Array ( [id] => 5054004 [patent_doc_number] => 20070056925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Selective etch of films with high dielectric constant with H2 addition' [patent_app_type] => utility [patent_app_number] => 11/223780 [patent_app_country] => US [patent_app_date] => 2005-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4298 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20070056925.pdf [firstpage_image] =>[orig_patent_app_number] => 11223780 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/223780
Selective etch of films with high dielectric constant with H2 addition Sep 8, 2005 Abandoned
Array ( [id] => 489607 [patent_doc_number] => 07214627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-08 [patent_title] => 'Graded junction termination extensions for electronic devices' [patent_app_type] => utility [patent_app_number] => 11/201066 [patent_app_country] => US [patent_app_date] => 2005-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4596 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/214/07214627.pdf [firstpage_image] =>[orig_patent_app_number] => 11201066 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/201066
Graded junction termination extensions for electronic devices Aug 8, 2005 Issued
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