Koosha Sharifi-tafreshi

Array ( [id] => 11207988 [patent_doc_number] => 09437621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-06 [patent_title] => 'Method of manufacturing components of display panel assembly from same mother substrate' [patent_app_type] => utility [patent_app_number] => 14/946936 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7774 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14946936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11266017 [patent_doc_number] => 09490320 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-08 [patent_title] => 'Uniaxially strained nanowire structure' [patent_app_type] => utility [patent_app_number] => 14/948039 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6796 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14948039 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10802654 [patent_doc_number] => 20160148811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-26 [patent_title] => 'Method of Manufacturing Semiconductor Device and Substrate Processing Apparatus' [patent_app_type] => utility [patent_app_number] => 14/947523 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 20117 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14947523 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10802928 [patent_doc_number] => 20160149085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-26 [patent_title] => 'METHOD OF MANUFACTURING LIGHT EMITTING ELEMENT' [patent_app_type] => utility [patent_app_number] => 14/947716 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14947716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11652763 [patent_doc_number] => 20170148664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'METHOD FOR THINNING SUBSTRATES' [patent_app_type] => utility [patent_app_number] => 14/946886 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 17020 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14946886 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11814323 [patent_doc_number] => 09718261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-01 [patent_title] => 'Assembly process of two substrates' [patent_app_type] => utility [patent_app_number] => 14/947254 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6736 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14947254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11918626 [patent_doc_number] => 09786820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-10 [patent_title] => 'Opto-electronic module and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/945505 [patent_app_country] => US [patent_app_date] => 2015-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 19 [patent_no_of_words] => 13227 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14945505 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11807231 [patent_doc_number] => 09548314 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-17 [patent_title] => 'Method of making a non-volatile memory (NVM) with trap-up reduction' [patent_app_type] => utility [patent_app_number] => 14/945981 [patent_app_country] => US [patent_app_date] => 2015-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2739 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14945981 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13640607 [patent_doc_number] => 09847264 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-19 [patent_title] => Method for manufacturing a semiconductor product wafer [patent_app_type] => utility [patent_app_number] => 14/946700 [patent_app_country] => US [patent_app_date] => 2015-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 2729 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14946700 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11452946 [patent_doc_number] => 09576595 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-21 [patent_title] => 'Transfer printing an epitaxial layer to a read/write head to form an integral laser' [patent_app_type] => utility [patent_app_number] => 14/946116 [patent_app_country] => US [patent_app_date] => 2015-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 27 [patent_no_of_words] => 5124 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14946116 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11807188 [patent_doc_number] => 09548271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-17 [patent_title] => 'Semiconductor package' [patent_app_type] => utility [patent_app_number] => 14/932122 [patent_app_country] => US [patent_app_date] => 2015-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3184 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14932122 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10725869 [patent_doc_number] => 20160072017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-10 [patent_title] => 'VERTICAL TOPOLOGY LIGHT EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/931544 [patent_app_country] => US [patent_app_date] => 2015-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6596 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14931544 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10710152 [patent_doc_number] => 20160056299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-25 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/931224 [patent_app_country] => US [patent_app_date] => 2015-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 21601 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14931224 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11807187 [patent_doc_number] => 09548270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-17 [patent_title] => 'Electrical fuse with metal line migration' [patent_app_type] => utility [patent_app_number] => 14/854770 [patent_app_country] => US [patent_app_date] => 2015-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 25 [patent_no_of_words] => 6058 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14854770 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11321616 [patent_doc_number] => 09520364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-13 [patent_title] => 'Front side package-level serialization for packages comprising unique identifiers' [patent_app_type] => utility [patent_app_number] => 14/836525 [patent_app_country] => US [patent_app_date] => 2015-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 14654 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14836525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10479362 [patent_doc_number] => 20150364379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-17 [patent_title] => 'Methods of Forming Gated Devices' [patent_app_type] => utility [patent_app_number] => 14/836130 [patent_app_country] => US [patent_app_date] => 2015-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4911 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14836130 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10703214 [patent_doc_number] => 20160049361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-18 [patent_title] => 'MAKING ELECTRICAL COMPONENTS IN HANDLE WAFERS OF INTEGRATED CIRCUIT PACKAGES' [patent_app_type] => utility [patent_app_number] => 14/833979 [patent_app_country] => US [patent_app_date] => 2015-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4851 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14833979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10472217 [patent_doc_number] => 20150357233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'METHOD AND APPARATUS FOR FABRICATING A MEMORY DEVICE WITH A DIELECTRIC ETCH STOP LAYER' [patent_app_type] => utility [patent_app_number] => 14/828371 [patent_app_country] => US [patent_app_date] => 2015-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7070 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14828371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11391924 [patent_doc_number] => 09553175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-24 [patent_title] => 'SONOS type stacks for nonvolatile charge trap memory devices and methods to form the same' [patent_app_type] => utility [patent_app_number] => 14/824023 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 44 [patent_no_of_words] => 17104 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14824023 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11869680 [patent_doc_number] => 20170236965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'METHOD FOR PRODUCING A REAR-SIDE CONTACT SYSTEM FOR A SILICON THIN-LAYER SOLAR CELL' [patent_app_type] => utility [patent_app_number] => 15/327385 [patent_app_country] => US [patent_app_date] => 2015-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3716 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15327385 [rel_patent_id] =>[rel_patent_doc_number] =>)