Koosha Sharifi-tafreshi
Examiner (ID: 1458, Phone: (571)270-5897 , Office: P/2623 )
Most Active Art Unit | 2623 |
Art Unit(s) | 2623, 2629, 2695 |
Total Applications | 1151 |
Issued Applications | 889 |
Pending Applications | 55 |
Abandoned Applications | 207 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 8866149
[patent_doc_number] => 20130149852
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-13
[patent_title] => 'METHOD FOR FORMING A SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/315171
[patent_app_country] => US
[patent_app_date] => 2011-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 9970
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[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13315171
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/315171 | METHOD FOR FORMING A SEMICONDUCTOR DEVICE | Dec 7, 2011 | Abandoned |
Array
(
[id] => 8055203
[patent_doc_number] => 20120077337
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-29
[patent_title] => 'METHOD OF MANUFACTURING HIGH-INTEGRATED SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURED USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/314125
[patent_app_country] => US
[patent_app_date] => 2011-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_no_of_words] => 5811
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0077/20120077337.pdf
[firstpage_image] =>[orig_patent_app_number] => 13314125
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/314125 | METHOD OF MANUFACTURING HIGH-INTEGRATED SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURED USING THE SAME | Dec 6, 2011 | Abandoned |
Array
(
[id] => 8665037
[patent_doc_number] => 08378499
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-19
[patent_title] => 'Semiconductor storage device'
[patent_app_type] => utility
[patent_app_number] => 13/311720
[patent_app_country] => US
[patent_app_date] => 2011-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 28
[patent_no_of_words] => 6727
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13311720
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/311720 | Semiconductor storage device | Dec 5, 2011 | Issued |
Array
(
[id] => 8252542
[patent_doc_number] => 20120156867
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-21
[patent_title] => 'METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/307270
[patent_app_country] => US
[patent_app_date] => 2011-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7769
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[pdf_file] => publications/A1/0156/20120156867.pdf
[firstpage_image] =>[orig_patent_app_number] => 13307270
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/307270 | Methods of manufacturing a semiconductor device | Nov 29, 2011 | Issued |
Array
(
[id] => 8221383
[patent_doc_number] => 20120135590
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-31
[patent_title] => 'SILICON REMOVAL FROM SURFACES AND METHOD OF FORMING HIGH K METAL GATE STRUCTURES USING SAME'
[patent_app_type] => utility
[patent_app_number] => 13/306616
[patent_app_country] => US
[patent_app_date] => 2011-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 3895
[patent_no_of_claims] => 20
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13306616
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/306616 | SILICON REMOVAL FROM SURFACES AND METHOD OF FORMING HIGH K METAL GATE STRUCTURES USING SAME | Nov 28, 2011 | Abandoned |
Array
(
[id] => 8359128
[patent_doc_number] => 20120214295
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-23
[patent_title] => 'METHOD FOR MANUFACTURING TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 13/305726
[patent_app_country] => US
[patent_app_date] => 2011-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 3044
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13305726
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/305726 | Method for manufacturing transistor | Nov 27, 2011 | Issued |
Array
(
[id] => 9250345
[patent_doc_number] => 08614123
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-12-24
[patent_title] => 'Method of forming a semiconductor device by using sacrificial gate electrodes and sacrificial self-aligned contact structures'
[patent_app_type] => utility
[patent_app_number] => 13/305131
[patent_app_country] => US
[patent_app_date] => 2011-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 5919
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13305131
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/305131 | Method of forming a semiconductor device by using sacrificial gate electrodes and sacrificial self-aligned contact structures | Nov 27, 2011 | Issued |
Array
(
[id] => 9440820
[patent_doc_number] => 08709930
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-29
[patent_title] => 'Semiconductor process'
[patent_app_type] => utility
[patent_app_number] => 13/304416
[patent_app_country] => US
[patent_app_date] => 2011-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[patent_no_of_words] => 4870
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13304416
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/304416 | Semiconductor process | Nov 24, 2011 | Issued |
Array
(
[id] => 8227979
[patent_doc_number] => 20120142177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-07
[patent_title] => 'METHODS OF MANUFACTURING A WIRING STRUCTURE AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/299538
[patent_app_country] => US
[patent_app_date] => 2011-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13299538
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/299538 | METHODS OF MANUFACTURING A WIRING STRUCTURE AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE | Nov 17, 2011 | Abandoned |
Array
(
[id] => 9710710
[patent_doc_number] => 08835278
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-16
[patent_title] => 'Method for forming a buried dielectric layer underneath a semiconductor fin'
[patent_app_type] => utility
[patent_app_number] => 13/885884
[patent_app_country] => US
[patent_app_date] => 2011-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13885884
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/885884 | Method for forming a buried dielectric layer underneath a semiconductor fin | Nov 15, 2011 | Issued |
Array
(
[id] => 8802237
[patent_doc_number] => 08440511
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-05-14
[patent_title] => 'Method for manufacturing multi-gate transistor device'
[patent_app_type] => utility
[patent_app_number] => 13/298264
[patent_app_country] => US
[patent_app_date] => 2011-11-16
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13298264
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/298264 | Method for manufacturing multi-gate transistor device | Nov 15, 2011 | Issued |
Array
(
[id] => 8659613
[patent_doc_number] => 20130040442
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-14
[patent_title] => 'METHOD OF MANUFACTURING GaN-BASED FILM'
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Array
(
[id] => 9203798
[patent_doc_number] => 20140002976
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-02
[patent_title] => 'RECESSED BOTTOM-ELECTRODE CAPACITORS AND METHODS OF ASSEMBLING SAME'
[patent_app_type] => utility
[patent_app_number] => 13/997974
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Array
(
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Array
(
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Array
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Array
(
[id] => 7772969
[patent_doc_number] => 20120037903
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[patent_title] => 'Method For Manufacturing Semiconductor Device, Semiconductor Device And Electronic Appliance'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/282557 | Method for manufacturing semiconductor device, semiconductor device and electronic appliance | Oct 26, 2011 | Issued |
Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/817112 | Method of manufacturing semiconductor device | Sep 19, 2011 | Issued |