Koosha Sharifi-tafreshi
Examiner (ID: 1458, Phone: (571)270-5897 , Office: P/2623 )
Most Active Art Unit | 2623 |
Art Unit(s) | 2623, 2629, 2695 |
Total Applications | 1151 |
Issued Applications | 889 |
Pending Applications | 55 |
Abandoned Applications | 207 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 4859755
[patent_doc_number] => 20080268605
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-30
[patent_title] => 'Capacitors and methods with praseodymium oxide insulators'
[patent_app_type] => utility
[patent_app_number] => 11/796289
[patent_app_country] => US
[patent_app_date] => 2007-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4670
[patent_no_of_claims] => 21
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0268/20080268605.pdf
[firstpage_image] =>[orig_patent_app_number] => 11796289
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/796289 | Capacitors and methods with praseodymium oxide insulators | Apr 26, 2007 | Issued |
Array
(
[id] => 5066624
[patent_doc_number] => 20070187725
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-16
[patent_title] => 'Method and apparatus for a semiconductor device with a high-k gate dielectric'
[patent_app_type] => utility
[patent_app_number] => 11/788229
[patent_app_country] => US
[patent_app_date] => 2007-04-19
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0187/20070187725.pdf
[firstpage_image] =>[orig_patent_app_number] => 11788229
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/788229 | Method and apparatus for a semiconductor device with a high-k gate dielectric | Apr 18, 2007 | Issued |
Array
(
[id] => 401184
[patent_doc_number] => 07291548
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-11-06
[patent_title] => 'Stress-relief layers and stress-compensation collars with low-temperature solders for board-level joints, and processes of making same'
[patent_app_type] => utility
[patent_app_number] => 11/736280
[patent_app_country] => US
[patent_app_date] => 2007-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[pdf_file] => patents/07/291/07291548.pdf
[firstpage_image] =>[orig_patent_app_number] => 11736280
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/736280 | Stress-relief layers and stress-compensation collars with low-temperature solders for board-level joints, and processes of making same | Apr 16, 2007 | Issued |
Array
(
[id] => 5110492
[patent_doc_number] => 20070194407
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-23
[patent_title] => 'Semiconductor device and manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/783779
[patent_app_country] => US
[patent_app_date] => 2007-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 51
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[patent_no_of_words] => 21909
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0194/20070194407.pdf
[firstpage_image] =>[orig_patent_app_number] => 11783779
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/783779 | Multilayered semiconductor structure containing a MISFET, a resistor, a capacitor, and an inductor | Apr 11, 2007 | Issued |
Array
(
[id] => 917000
[patent_doc_number] => 07323372
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-29
[patent_title] => 'Method and process intermediate for electrostatic discharge protection in flat panel imaging detectors'
[patent_app_type] => utility
[patent_app_number] => 11/694743
[patent_app_country] => US
[patent_app_date] => 2007-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2256
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/323/07323372.pdf
[firstpage_image] =>[orig_patent_app_number] => 11694743
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/694743 | Method and process intermediate for electrostatic discharge protection in flat panel imaging detectors | Mar 29, 2007 | Issued |
Array
(
[id] => 4443534
[patent_doc_number] => 07928478
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-04-19
[patent_title] => 'Image sensor with improved color crosstalk'
[patent_app_type] => utility
[patent_app_number] => 11/730177
[patent_app_country] => US
[patent_app_date] => 2007-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2834
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[pdf_file] => patents/07/928/07928478.pdf
[firstpage_image] =>[orig_patent_app_number] => 11730177
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/730177 | Image sensor with improved color crosstalk | Mar 28, 2007 | Issued |
Array
(
[id] => 5188535
[patent_doc_number] => 20070166843
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-19
[patent_title] => 'Method of repairing a light-emitting device and method of manufacturing a light-emitting device'
[patent_app_type] => utility
[patent_app_number] => 11/726551
[patent_app_country] => US
[patent_app_date] => 2007-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 17367
[patent_no_of_claims] => 3
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[patent_words_short_claim] => 0
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0166/20070166843.pdf
[firstpage_image] =>[orig_patent_app_number] => 11726551
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/726551 | Method of repairing a light-emitting device and method of manufacturing a light-emitting device | Mar 21, 2007 | Abandoned |
Array
(
[id] => 5060336
[patent_doc_number] => 20070221973
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-27
[patent_title] => 'SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/688536
[patent_app_country] => US
[patent_app_date] => 2007-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5683
[patent_no_of_claims] => 12
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0221/20070221973.pdf
[firstpage_image] =>[orig_patent_app_number] => 11688536
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/688536 | SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING THE SAME | Mar 19, 2007 | Abandoned |
Array
(
[id] => 5186026
[patent_doc_number] => 20070164333
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-19
[patent_title] => 'INTEGRATED MIS PHOTOSENSITIVE DEVICE USING CONTINUOUS FILMS'
[patent_app_type] => utility
[patent_app_number] => 11/687495
[patent_app_country] => US
[patent_app_date] => 2007-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[patent_no_of_words] => 6569
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[pdf_file] => publications/A1/0164/20070164333.pdf
[firstpage_image] =>[orig_patent_app_number] => 11687495
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/687495 | Integrated MIS photosensitive device using continuous films | Mar 15, 2007 | Issued |
Array
(
[id] => 5245146
[patent_doc_number] => 20070241380
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-18
[patent_title] => 'SEMICONDUCTOR STORAGE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/686885
[patent_app_country] => US
[patent_app_date] => 2007-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 6689
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0241/20070241380.pdf
[firstpage_image] =>[orig_patent_app_number] => 11686885
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/686885 | Semiconductor storage device | Mar 14, 2007 | Issued |
Array
(
[id] => 4568771
[patent_doc_number] => 07858466
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-12-28
[patent_title] => 'Different-voltage device manufactured by a CMOS compatible process and high-voltage device used in the different-voltage device'
[patent_app_type] => utility
[patent_app_number] => 11/682621
[patent_app_country] => US
[patent_app_date] => 2007-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 1636
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/858/07858466.pdf
[firstpage_image] =>[orig_patent_app_number] => 11682621
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/682621 | Different-voltage device manufactured by a CMOS compatible process and high-voltage device used in the different-voltage device | Mar 5, 2007 | Issued |
Array
(
[id] => 4723902
[patent_doc_number] => 20080203443
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-28
[patent_title] => 'Independently-Double-Gated Transistor Memory (IDGM)'
[patent_app_type] => utility
[patent_app_number] => 11/678026
[patent_app_country] => US
[patent_app_date] => 2007-02-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0203/20080203443.pdf
[firstpage_image] =>[orig_patent_app_number] => 11678026
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/678026 | Independently-double-gated transistor memory (IDGM) | Feb 21, 2007 | Issued |
Array
(
[id] => 5296645
[patent_doc_number] => 20090011571
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-08
[patent_title] => 'WAFER WORKING METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/281590
[patent_app_country] => US
[patent_app_date] => 2007-02-16
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0011/20090011571.pdf
[firstpage_image] =>[orig_patent_app_number] => 12281590
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/281590 | WAFER WORKING METHOD | Feb 15, 2007 | Abandoned |
Array
(
[id] => 8846670
[patent_doc_number] => 08455854
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-06-04
[patent_title] => 'Nonvolatile memory device including amorphous alloy metal oxide layer and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/704365
[patent_app_country] => US
[patent_app_date] => 2007-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11704365
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/704365 | Nonvolatile memory device including amorphous alloy metal oxide layer and method of manufacturing the same | Feb 8, 2007 | Issued |
Array
(
[id] => 557063
[patent_doc_number] => 07470552
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-30
[patent_title] => 'Method for production of MRAM elements'
[patent_app_type] => utility
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[pdf_file] => patents/07/470/07470552.pdf
[firstpage_image] =>[orig_patent_app_number] => 11700958
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/700958 | Method for production of MRAM elements | Jan 31, 2007 | Issued |
Array
(
[id] => 322524
[patent_doc_number] => 07517756
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-14
[patent_title] => 'Flash memory array with increased coupling between floating and control gates'
[patent_app_type] => utility
[patent_app_number] => 11/668306
[patent_app_country] => US
[patent_app_date] => 2007-01-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/517/07517756.pdf
[firstpage_image] =>[orig_patent_app_number] => 11668306
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/668306 | Flash memory array with increased coupling between floating and control gates | Jan 28, 2007 | Issued |
Array
(
[id] => 810537
[patent_doc_number] => 07417294
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-26
[patent_title] => 'Microelectronic imaging units and methods of manufacturing microelectronic imaging units'
[patent_app_type] => utility
[patent_app_number] => 11/653861
[patent_app_country] => US
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[pdf_file] => patents/07/417/07417294.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/653861 | Microelectronic imaging units and methods of manufacturing microelectronic imaging units | Jan 16, 2007 | Issued |
Array
(
[id] => 411605
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[patent_title] => 'Multiple seed layers for interconnects'
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[pdf_file] => patents/07/282/07282445.pdf
[firstpage_image] =>[orig_patent_app_number] => 11654478
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/654478 | Multiple seed layers for interconnects | Jan 16, 2007 | Issued |
Array
(
[id] => 4932994
[patent_doc_number] => 20080003769
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'Method for fabricating semiconductor device having trench isolation layer'
[patent_app_type] => utility
[patent_app_number] => 11/647929
[patent_app_country] => US
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[pdf_file] => publications/A1/0003/20080003769.pdf
[firstpage_image] =>[orig_patent_app_number] => 11647929
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/647929 | Method for fabricating semiconductor device having trench isolation layer | Dec 28, 2006 | Issued |
Array
(
[id] => 4933012
[patent_doc_number] => 20080003787
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[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
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[pdf_file] => publications/A1/0003/20080003787.pdf
[firstpage_image] =>[orig_patent_app_number] => 11617628
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/617628 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Dec 27, 2006 | Abandoned |