Search

Koosha Sharifi-tafreshi

Examiner (ID: 1458, Phone: (571)270-5897 , Office: P/2623 )

Most Active Art Unit
2623
Art Unit(s)
2623, 2629, 2695
Total Applications
1151
Issued Applications
889
Pending Applications
55
Abandoned Applications
207

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5152097 [patent_doc_number] => 20070034979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Microelectronic imaging units and methods of manufacturing microelectronic imaging units' [patent_app_type] => utility [patent_app_number] => 11/583031 [patent_app_country] => US [patent_app_date] => 2006-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4350 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20070034979.pdf [firstpage_image] =>[orig_patent_app_number] => 11583031 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/583031
Microelectronic imaging units Oct 18, 2006 Issued
Array ( [id] => 5051521 [patent_doc_number] => 20070032066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/546285 [patent_app_country] => US [patent_app_date] => 2006-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5693 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20070032066.pdf [firstpage_image] =>[orig_patent_app_number] => 11546285 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/546285
Method of making wafer level package structure by grinding the backside thereof and then forming metal layer on the ground side Oct 11, 2006 Issued
Array ( [id] => 5031694 [patent_doc_number] => 20070096233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'CMOS IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 11/548496 [patent_app_country] => US [patent_app_date] => 2006-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2596 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20070096233.pdf [firstpage_image] =>[orig_patent_app_number] => 11548496 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/548496
CMOS IMAGE SENSOR Oct 10, 2006 Abandoned
Array ( [id] => 5202433 [patent_doc_number] => 20070023912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'Integrating metal with ultra low-k-dielectrics' [patent_app_type] => utility [patent_app_number] => 11/544167 [patent_app_country] => US [patent_app_date] => 2006-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 49 [patent_no_of_words] => 8321 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20070023912.pdf [firstpage_image] =>[orig_patent_app_number] => 11544167 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/544167
Integrating metal with ultra low-k-dielectrics Oct 4, 2006 Abandoned
Array ( [id] => 4982962 [patent_doc_number] => 20070087520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-19 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/542219 [patent_app_country] => US [patent_app_date] => 2006-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5037 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20070087520.pdf [firstpage_image] =>[orig_patent_app_number] => 11542219 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/542219
Method for manufacturing semiconductor device Oct 3, 2006 Issued
Array ( [id] => 8005879 [patent_doc_number] => 08084340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Method of manufacturing semiconductor device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/541728 [patent_app_country] => US [patent_app_date] => 2006-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 4798 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/084/08084340.pdf [firstpage_image] =>[orig_patent_app_number] => 11541728 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/541728
Method of manufacturing semiconductor device and semiconductor device Oct 2, 2006 Issued
Array ( [id] => 4988783 [patent_doc_number] => 20070155122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'TRENCH ISOLATION STRUCTURE HAVING DIFFERENT STRESS' [patent_app_type] => utility [patent_app_number] => 11/537809 [patent_app_country] => US [patent_app_date] => 2006-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7448 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20070155122.pdf [firstpage_image] =>[orig_patent_app_number] => 11537809 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/537809
Trench isolation structure having different stress Oct 1, 2006 Issued
Array ( [id] => 132597 [patent_doc_number] => 07696050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'Method of manufacturing semiconductor device carrying out ion implantation before silicide process' [patent_app_type] => utility [patent_app_number] => 11/537208 [patent_app_country] => US [patent_app_date] => 2006-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 5839 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 332 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/696/07696050.pdf [firstpage_image] =>[orig_patent_app_number] => 11537208 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/537208
Method of manufacturing semiconductor device carrying out ion implantation before silicide process Sep 28, 2006 Issued
Array ( [id] => 8386668 [patent_doc_number] => 08264071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-11 [patent_title] => 'Power semiconductor module with overcurrent protective device' [patent_app_type] => utility [patent_app_number] => 11/527936 [patent_app_country] => US [patent_app_date] => 2006-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2525 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11527936 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/527936
Power semiconductor module with overcurrent protective device Sep 26, 2006 Issued
Array ( [id] => 5171953 [patent_doc_number] => 20070072386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Method of forming an alignment key having a capping layer and method of fabricating a semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 11/524318 [patent_app_country] => US [patent_app_date] => 2006-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5549 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20070072386.pdf [firstpage_image] =>[orig_patent_app_number] => 11524318 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/524318
Method of forming an alignment key having a capping layer and method of fabricating a semiconductor device using the same Sep 20, 2006 Issued
Array ( [id] => 7535654 [patent_doc_number] => 08049282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-01 [patent_title] => 'Bipolar device having buried contacts' [patent_app_type] => utility [patent_app_number] => 11/533785 [patent_app_country] => US [patent_app_date] => 2006-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 3372 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/049/08049282.pdf [firstpage_image] =>[orig_patent_app_number] => 11533785 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/533785
Bipolar device having buried contacts Sep 20, 2006 Issued
Array ( [id] => 4499112 [patent_doc_number] => 07948011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-24 [patent_title] => 'N-polar aluminum gallium nitride/gallium nitride enhancement-mode field effect transistor' [patent_app_type] => utility [patent_app_number] => 11/523286 [patent_app_country] => US [patent_app_date] => 2006-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3475 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/948/07948011.pdf [firstpage_image] =>[orig_patent_app_number] => 11523286 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/523286
N-polar aluminum gallium nitride/gallium nitride enhancement-mode field effect transistor Sep 17, 2006 Issued
Array ( [id] => 151637 [patent_doc_number] => 07678624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-16 [patent_title] => 'Semiconductor device and method for manufacturing same' [patent_app_type] => utility [patent_app_number] => 11/519514 [patent_app_country] => US [patent_app_date] => 2006-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 31 [patent_no_of_words] => 6380 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/678/07678624.pdf [firstpage_image] =>[orig_patent_app_number] => 11519514 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/519514
Semiconductor device and method for manufacturing same Sep 11, 2006 Issued
Array ( [id] => 5095745 [patent_doc_number] => 20070117354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-24 [patent_title] => 'Large area semiconductor on glass insulator' [patent_app_type] => utility [patent_app_number] => 11/517908 [patent_app_country] => US [patent_app_date] => 2006-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7842 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20070117354.pdf [firstpage_image] =>[orig_patent_app_number] => 11517908 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/517908
Large area semiconductor on glass insulator Sep 7, 2006 Issued
Array ( [id] => 5120087 [patent_doc_number] => 20070141801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-21 [patent_title] => 'Semiconductor devices, CMOS image sensors, and methods of manufacturing same' [patent_app_type] => utility [patent_app_number] => 11/517238 [patent_app_country] => US [patent_app_date] => 2006-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6242 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20070141801.pdf [firstpage_image] =>[orig_patent_app_number] => 11517238 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/517238
Semiconductor devices, CMOS image sensors, and methods of manufacturing same Sep 6, 2006 Issued
Array ( [id] => 5141981 [patent_doc_number] => 20070004197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Methods for creating electrophoretically insulated vias in semiconductive substrates' [patent_app_type] => utility [patent_app_number] => 11/516403 [patent_app_country] => US [patent_app_date] => 2006-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4109 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20070004197.pdf [firstpage_image] =>[orig_patent_app_number] => 11516403 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/516403
Methods for creating electrophoretically insulated vias in semiconductive substrates Sep 5, 2006 Issued
Array ( [id] => 903089 [patent_doc_number] => 07335580 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-02-26 [patent_title] => 'Lamellar-derived microelectronic component array and method of fabrication' [patent_app_type] => utility [patent_app_number] => 11/515284 [patent_app_country] => US [patent_app_date] => 2006-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 30 [patent_no_of_words] => 31629 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 467 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/335/07335580.pdf [firstpage_image] =>[orig_patent_app_number] => 11515284 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/515284
Lamellar-derived microelectronic component array and method of fabrication Aug 31, 2006 Issued
Array ( [id] => 359670 [patent_doc_number] => 07485549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Seal ring for mixed circuitry semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/515179 [patent_app_country] => US [patent_app_date] => 2006-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3319 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/485/07485549.pdf [firstpage_image] =>[orig_patent_app_number] => 11515179 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/515179
Seal ring for mixed circuitry semiconductor devices Aug 30, 2006 Issued
Array ( [id] => 5148895 [patent_doc_number] => 20070048955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Method for enhancing electrode surface area in DRAM cell capacitors' [patent_app_type] => utility [patent_app_number] => 11/514694 [patent_app_country] => US [patent_app_date] => 2006-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5287 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20070048955.pdf [firstpage_image] =>[orig_patent_app_number] => 11514694 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/514694
Method for enhancing electrode surface area in DRAM cell capacitors Aug 30, 2006 Issued
Array ( [id] => 5054326 [patent_doc_number] => 20070057247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'VERSATILE SYSTEM FOR CHARGE DISSIPATION IN THE FORMATION OF SEMICONDUCTOR DEVICE STRUCTURES' [patent_app_type] => utility [patent_app_number] => 11/468648 [patent_app_country] => US [patent_app_date] => 2006-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3756 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20070057247.pdf [firstpage_image] =>[orig_patent_app_number] => 11468648 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/468648
Versatile system for charge dissipation in the formation of semiconductor device structures Aug 29, 2006 Issued
Menu