Koosha Sharifi-tafreshi

Array ( [id] => 5034894 [patent_doc_number] => 20070099433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'GAS DIELECTRIC STRUCTURE FORMATION USING RADIATION' [patent_app_type] => utility [patent_app_number] => 11/163909 [patent_app_country] => US [patent_app_date] => 2005-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1876 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20070099433.pdf [firstpage_image] =>[orig_patent_app_number] => 11163909 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 587244 [patent_doc_number] => 07439159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-21 [patent_title] => 'Fusion bonding process and structure for fabricating silicon-on-insulator (SOI) semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/262179 [patent_app_country] => US [patent_app_date] => 2005-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2933 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/439/07439159.pdf [firstpage_image] =>[orig_patent_app_number] => 11262179 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5724184 [patent_doc_number] => 20060054944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Semiconductor device and process for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/260197 [patent_app_country] => US [patent_app_date] => 2005-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4531 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20060054944.pdf [firstpage_image] =>[orig_patent_app_number] => 11260197 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5034852 [patent_doc_number] => 20070099391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Methods for forming semiconductor structures with buried isolation collars and semiconductor structures formed by these methods' [patent_app_type] => utility [patent_app_number] => 11/262128 [patent_app_country] => US [patent_app_date] => 2005-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8266 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20070099391.pdf [firstpage_image] =>[orig_patent_app_number] => 11262128 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 369855 [patent_doc_number] => 07476628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-13 [patent_title] => 'Metal oxide layer formed on substrates and its fabrication methods' [patent_app_type] => utility [patent_app_number] => 11/258008 [patent_app_country] => US [patent_app_date] => 2005-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2928 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/476/07476628.pdf [firstpage_image] =>[orig_patent_app_number] => 11258008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 565332 [patent_doc_number] => 07465644 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-16 [patent_title] => 'Isolation region bird\'s beak suppression' [patent_app_type] => utility [patent_app_number] => 11/258209 [patent_app_country] => US [patent_app_date] => 2005-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 2903 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/465/07465644.pdf [firstpage_image] =>[orig_patent_app_number] => 11258209 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 373329 [patent_doc_number] => 07473632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-06 [patent_title] => 'Semiconductor device with an air gap between lower interconnections and a connection portion to the lower interconnections not formed adjacent to the air gap' [patent_app_type] => utility [patent_app_number] => 11/253568 [patent_app_country] => US [patent_app_date] => 2005-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 43 [patent_no_of_words] => 14030 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/473/07473632.pdf [firstpage_image] =>[orig_patent_app_number] => 11253568 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 860307 [patent_doc_number] => 07371657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-13 [patent_title] => 'Method for forming an isolating trench with a dielectric material' [patent_app_type] => utility [patent_app_number] => 11/252878 [patent_app_country] => US [patent_app_date] => 2005-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3734 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/371/07371657.pdf [firstpage_image] =>[orig_patent_app_number] => 11252878 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5880985 [patent_doc_number] => 20060030068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Fabrication method for phase change diode memory cells' [patent_app_type] => utility [patent_app_number] => 11/253233 [patent_app_country] => US [patent_app_date] => 2005-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3160 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20060030068.pdf [firstpage_image] =>[orig_patent_app_number] => 11253233 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 876282 [patent_doc_number] => 07358198 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-15 [patent_title] => 'Semiconductor device and method for fabricating same' [patent_app_type] => utility [patent_app_number] => 11/250439 [patent_app_country] => US [patent_app_date] => 2005-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 5673 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/358/07358198.pdf [firstpage_image] =>[orig_patent_app_number] => 11250439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4982965 [patent_doc_number] => 20070087523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-19 [patent_title] => 'Recessed shallow trench isolation' [patent_app_type] => utility [patent_app_number] => 11/249228 [patent_app_country] => US [patent_app_date] => 2005-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5468 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20070087523.pdf [firstpage_image] =>[orig_patent_app_number] => 11249228 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5800657 [patent_doc_number] => 20060035468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Semiconductor device and method for producing the same' [patent_app_type] => utility [patent_app_number] => 11/249908 [patent_app_country] => US [patent_app_date] => 2005-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5370 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20060035468.pdf [firstpage_image] =>[orig_patent_app_number] => 11249908 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5591009 [patent_doc_number] => 20060040461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'Method of forming a capacitor' [patent_app_type] => utility [patent_app_number] => 11/248311 [patent_app_country] => US [patent_app_date] => 2005-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3599 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20060040461.pdf [firstpage_image] =>[orig_patent_app_number] => 11248311 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5878132 [patent_doc_number] => 20060027911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Methods for creating electrophoretically insulated vias in semiconductive substrates and resulting structures' [patent_app_type] => utility [patent_app_number] => 11/247495 [patent_app_country] => US [patent_app_date] => 2005-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4079 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20060027911.pdf [firstpage_image] =>[orig_patent_app_number] => 11247495 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5727060 [patent_doc_number] => 20060057820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Method and apparatus for producing ultra-thin semiconductor chip and method and apparatus for producing ultra-thin back-illuminated solid-state image pickup device' [patent_app_type] => utility [patent_app_number] => 11/245251 [patent_app_country] => US [patent_app_date] => 2005-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 23605 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20060057820.pdf [firstpage_image] =>[orig_patent_app_number] => 11245251 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5820660 [patent_doc_number] => 20060024973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Methods of etching a contact opening over a node location on a semiconductor substrate' [patent_app_type] => utility [patent_app_number] => 11/237433 [patent_app_country] => US [patent_app_date] => 2005-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4207 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20060024973.pdf [firstpage_image] =>[orig_patent_app_number] => 11237433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 352594 [patent_doc_number] => 07491615 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-17 [patent_title] => 'Method of fabricating strained-silicon transistors and strained-silicon CMOS transistors' [patent_app_type] => utility [patent_app_number] => 11/162798 [patent_app_country] => US [patent_app_date] => 2005-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2645 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/491/07491615.pdf [firstpage_image] =>[orig_patent_app_number] => 11162798 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5183109 [patent_doc_number] => 20070054463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-08 [patent_title] => 'Method for forming spacers between bitlines in virtual ground memory array and related structure' [patent_app_type] => utility [patent_app_number] => 11/227749 [patent_app_country] => US [patent_app_date] => 2005-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20070054463.pdf [firstpage_image] =>[orig_patent_app_number] => 11227749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 613134 [patent_doc_number] => 07148533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-12 [patent_title] => 'Memory resistance film with controlled oxygen content' [patent_app_type] => utility [patent_app_number] => 11/226998 [patent_app_country] => US [patent_app_date] => 2005-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4464 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/148/07148533.pdf [firstpage_image] =>[orig_patent_app_number] => 11226998 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5747953 [patent_doc_number] => 20060110884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Method of manufacturing a transistor and a method of forming a memory device' [patent_app_type] => utility [patent_app_number] => 11/222613 [patent_app_country] => US [patent_app_date] => 2005-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 122 [patent_figures_cnt] => 122 [patent_no_of_words] => 19884 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20060110884.pdf [firstpage_image] =>[orig_patent_app_number] => 11222613 [rel_patent_id] =>[rel_patent_doc_number] =>)