Koosha Sharifi-tafreshi

Array ( [id] => 421865 [patent_doc_number] => 07273796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-25 [patent_title] => 'Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry' [patent_app_type] => utility [patent_app_number] => 11/087218 [patent_app_country] => US [patent_app_date] => 2005-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3316 [patent_no_of_claims] => 67 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/273/07273796.pdf [firstpage_image] =>[orig_patent_app_number] => 11087218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7183433 [patent_doc_number] => 20050161796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-28 [patent_title] => 'Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice' [patent_app_type] => utility [patent_app_number] => 11/086144 [patent_app_country] => US [patent_app_date] => 2005-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3383 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20050161796.pdf [firstpage_image] =>[orig_patent_app_number] => 11086144 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5760301 [patent_doc_number] => 20060211246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Plasma enhanced atomic layer deposition system and method' [patent_app_type] => utility [patent_app_number] => 11/083899 [patent_app_country] => US [patent_app_date] => 2005-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 19029 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20060211246.pdf [firstpage_image] =>[orig_patent_app_number] => 11083899 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5913053 [patent_doc_number] => 20060128115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-15 [patent_title] => 'Method for forming a shallow trench isolation structure with reduced stress' [patent_app_type] => utility [patent_app_number] => 11/076908 [patent_app_country] => US [patent_app_date] => 2005-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2056 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20060128115.pdf [firstpage_image] =>[orig_patent_app_number] => 11076908 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5077457 [patent_doc_number] => 20070120681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-31 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/583365 [patent_app_country] => US [patent_app_date] => 2005-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 16222 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20070120681.pdf [firstpage_image] =>[orig_patent_app_number] => 10583365 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7003731 [patent_doc_number] => 20050169044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Magnetic memory device having magnetic shield layer, and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/070379 [patent_app_country] => US [patent_app_date] => 2005-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 13266 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20050169044.pdf [firstpage_image] =>[orig_patent_app_number] => 11070379 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7036882 [patent_doc_number] => 20050156316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'Refractory metal nitride barrier layer with gradient nitrogen concentration' [patent_app_type] => utility [patent_app_number] => 11/070569 [patent_app_country] => US [patent_app_date] => 2005-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4928 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20050156316.pdf [firstpage_image] =>[orig_patent_app_number] => 11070569 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5677936 [patent_doc_number] => 20060183292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'STI liner modification method' [patent_app_type] => utility [patent_app_number] => 11/059728 [patent_app_country] => US [patent_app_date] => 2005-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3643 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20060183292.pdf [firstpage_image] =>[orig_patent_app_number] => 11059728 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7074904 [patent_doc_number] => 20050148172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-07 [patent_title] => 'Seed layers for metallic interconnects' [patent_app_type] => utility [patent_app_number] => 11/057485 [patent_app_country] => US [patent_app_date] => 2005-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8296 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20050148172.pdf [firstpage_image] =>[orig_patent_app_number] => 11057485 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7094926 [patent_doc_number] => 20050127509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/040000 [patent_app_country] => US [patent_app_date] => 2005-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7690 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20050127509.pdf [firstpage_image] =>[orig_patent_app_number] => 11040000 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5874556 [patent_doc_number] => 20060166457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Method of making transistors and non-silicided polysilicon resistors for mixed signal circuits' [patent_app_type] => utility [patent_app_number] => 11/040749 [patent_app_country] => US [patent_app_date] => 2005-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4063 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20060166457.pdf [firstpage_image] =>[orig_patent_app_number] => 11040749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5874556 [patent_doc_number] => 20060166457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Method of making transistors and non-silicided polysilicon resistors for mixed signal circuits' [patent_app_type] => utility [patent_app_number] => 11/040749 [patent_app_country] => US [patent_app_date] => 2005-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4063 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20060166457.pdf [firstpage_image] =>[orig_patent_app_number] => 11040749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5694310 [patent_doc_number] => 20060154457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Method for varying the uniformity of a dopant as it is placed in a substrate by varying the speed of the implant across the substrate' [patent_app_type] => utility [patent_app_number] => 11/033939 [patent_app_country] => US [patent_app_date] => 2005-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4165 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20060154457.pdf [firstpage_image] =>[orig_patent_app_number] => 11033939 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5694294 [patent_doc_number] => 20060154441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Method for forming a buried diffusion layer with reducing topography in a surface of a semiconductor substrate' [patent_app_type] => utility [patent_app_number] => 11/032045 [patent_app_country] => US [patent_app_date] => 2005-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2206 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20060154441.pdf [firstpage_image] =>[orig_patent_app_number] => 11032045 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7144169 [patent_doc_number] => 20050118745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-02 [patent_title] => 'Light emitting device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/029425 [patent_app_country] => US [patent_app_date] => 2005-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12090 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20050118745.pdf [firstpage_image] =>[orig_patent_app_number] => 11029425 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 860306 [patent_doc_number] => 07371656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-13 [patent_title] => 'Method for forming STI of semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/024439 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1190 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/371/07371656.pdf [firstpage_image] =>[orig_patent_app_number] => 11024439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7183319 [patent_doc_number] => 20050191411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-01 [patent_title] => 'Structure and manufacturing process of localized shunt to reduce electromigration failure of copper dual damascene process' [patent_app_type] => utility [patent_app_number] => 11/026078 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2209 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20050191411.pdf [firstpage_image] =>[orig_patent_app_number] => 11026078 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7253590 [patent_doc_number] => 20050142805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Methods for fabricating an STI film of a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/027519 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1748 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20050142805.pdf [firstpage_image] =>[orig_patent_app_number] => 11027519 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6978041 [patent_doc_number] => 20050287759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Method and apparatus for a semiconductor device with a high-k gate dielectric' [patent_app_type] => utility [patent_app_number] => 11/021269 [patent_app_country] => US [patent_app_date] => 2004-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8069 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20050287759.pdf [firstpage_image] =>[orig_patent_app_number] => 11021269 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6903429 [patent_doc_number] => 20050098824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-12 [patent_title] => 'Bit line contact structure and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 11/019339 [patent_app_country] => US [patent_app_date] => 2004-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 2887 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20050098824.pdf [firstpage_image] =>[orig_patent_app_number] => 11019339 [rel_patent_id] =>[rel_patent_doc_number] =>)