Koosha Sharifi-tafreshi
Examiner (ID: 1458, Phone: (571)270-5897 , Office: P/2623 )
Most Active Art Unit | 2623 |
Art Unit(s) | 2623, 2629, 2695 |
Total Applications | 1151 |
Issued Applications | 889 |
Pending Applications | 55 |
Abandoned Applications | 207 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 7423689
[patent_doc_number] => 20040229446
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-18
[patent_title] => 'Method of production of semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/828328
[patent_app_country] => US
[patent_app_date] => 2004-04-21
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0229/20040229446.pdf
[firstpage_image] =>[orig_patent_app_number] => 10828328
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/828328 | Method of producing vias and other conductor parts on an electrode terminal forming surface of a semiconductor wafer | Apr 20, 2004 | Issued |
Array
(
[id] => 1089227
[patent_doc_number] => 06828252
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-12-07
[patent_title] => 'Method of etching a contact opening'
[patent_app_type] => B2
[patent_app_number] => 10/830274
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[patent_app_date] => 2004-04-21
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/828/06828252.pdf
[firstpage_image] =>[orig_patent_app_number] => 10830274
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/830274 | Method of etching a contact opening | Apr 20, 2004 | Issued |
Array
(
[id] => 7428982
[patent_doc_number] => 20040209410
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-21
[patent_title] => 'Beam irradiation apparatus, beam irradiation method, and method for manufacturing thin film transistor'
[patent_app_type] => new
[patent_app_number] => 10/827402
[patent_app_country] => US
[patent_app_date] => 2004-04-20
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[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0209/20040209410.pdf
[firstpage_image] =>[orig_patent_app_number] => 10827402
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/827402 | Beam irradiation apparatus, beam irradiation method, and method for manufacturing thin film transistor | Apr 19, 2004 | Issued |
Array
(
[id] => 606419
[patent_doc_number] => 07153784
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-26
[patent_title] => 'Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode'
[patent_app_type] => utility
[patent_app_number] => 10/828958
[patent_app_country] => US
[patent_app_date] => 2004-04-20
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/828958 | Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode | Apr 19, 2004 | Issued |
Array
(
[id] => 446214
[patent_doc_number] => 07253125
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-08-07
[patent_title] => 'Method to improve mechanical strength of low-k dielectric film using modulated UV exposure'
[patent_app_type] => utility
[patent_app_number] => 10/825888
[patent_app_country] => US
[patent_app_date] => 2004-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/07/253/07253125.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/825888 | Method to improve mechanical strength of low-k dielectric film using modulated UV exposure | Apr 15, 2004 | Issued |
Array
(
[id] => 7089180
[patent_doc_number] => 20050009293
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[patent_kind] => A1
[patent_issue_date] => 2005-01-13
[patent_title] => 'Method of forming trench isolations'
[patent_app_type] => utility
[patent_app_number] => 10/822378
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[firstpage_image] =>[orig_patent_app_number] => 10822378
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/822378 | Method of forming trench isolations | Apr 11, 2004 | Issued |
Array
(
[id] => 7740353
[patent_doc_number] => 08105923
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[patent_issue_date] => 2012-01-31
[patent_title] => 'Sintered semiconductor material'
[patent_app_type] => utility
[patent_app_number] => 10/552548
[patent_app_country] => US
[patent_app_date] => 2004-04-09
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/08/105/08105923.pdf
[firstpage_image] =>[orig_patent_app_number] => 10552548
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/552548 | Sintered semiconductor material | Apr 8, 2004 | Issued |
Array
(
[id] => 393923
[patent_doc_number] => 07297616
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[patent_kind] => B2
[patent_issue_date] => 2007-11-20
[patent_title] => 'Methods, photoresists and substrates for ion-implant lithography'
[patent_app_type] => utility
[patent_app_number] => 10/822225
[patent_app_country] => US
[patent_app_date] => 2004-04-09
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[patent_drawing_sheets_cnt] => 0
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[pdf_file] => patents/07/297/07297616.pdf
[firstpage_image] =>[orig_patent_app_number] => 10822225
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/822225 | Methods, photoresists and substrates for ion-implant lithography | Apr 8, 2004 | Issued |
Array
(
[id] => 456415
[patent_doc_number] => 07244634
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-07-17
[patent_title] => 'Stress-relief layer and stress-compensation collar in contact arrays, and processes of making same'
[patent_app_type] => utility
[patent_app_number] => 10/815968
[patent_app_country] => US
[patent_app_date] => 2004-03-31
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[firstpage_image] =>[orig_patent_app_number] => 10815968
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/815968 | Stress-relief layer and stress-compensation collar in contact arrays, and processes of making same | Mar 30, 2004 | Issued |
Array
(
[id] => 7329057
[patent_doc_number] => 20040253834
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[patent_issue_date] => 2004-12-16
[patent_title] => 'Method for fabricating a trench isolation structure'
[patent_app_type] => new
[patent_app_number] => 10/812418
[patent_app_country] => US
[patent_app_date] => 2004-03-30
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/812418 | Method for fabricating a trench isolation structure | Mar 29, 2004 | Abandoned |
Array
(
[id] => 779642
[patent_doc_number] => 06995471
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-07
[patent_title] => 'Self-passivated copper interconnect structure'
[patent_app_type] => utility
[patent_app_number] => 10/812734
[patent_app_country] => US
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[pdf_file] => patents/06/995/06995471.pdf
[firstpage_image] =>[orig_patent_app_number] => 10812734
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/812734 | Self-passivated copper interconnect structure | Mar 29, 2004 | Issued |
Array
(
[id] => 503117
[patent_doc_number] => 07205619
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[patent_issue_date] => 2007-04-17
[patent_title] => 'Method of producing semiconductor device and semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/806588 | Method of producing semiconductor device and semiconductor device | Mar 22, 2004 | Issued |
Array
(
[id] => 7264111
[patent_doc_number] => 20040241973
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[patent_title] => 'Electrode, method of manufacturing the same, ferroelectric memory, and semiconductor device'
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Array
(
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[patent_title] => 'Semiconductor processing methods of forming and utilizing antireflective material layers, and methods of forming transistor gate stacks'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/802900 | Electromechanical three-trace junction devices | Mar 16, 2004 | Issued |
Array
(
[id] => 542379
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[patent_issue_date] => 2007-01-23
[patent_title] => 'System and method for providing a self heating adjustable TiSi2 resistor'
[patent_app_type] => utility
[patent_app_number] => 10/801268
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/801268 | System and method for providing a self heating adjustable TiSi2 resistor | Mar 15, 2004 | Issued |
Array
(
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[patent_title] => 'Methods of fabricating a semiconductor device having MOS transistor with strained channel'
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Array
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/794738 | Low stress barrier layer removal | Mar 2, 2004 | Issued |