Koosha Sharifi-tafreshi

Array ( [id] => 7401809 [patent_doc_number] => 20040105319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'METHOD OF MANUFACTURING A SCALABLE FLASH EEPROM MEMORY CELL WITH FLOATING GATE SPACER WRAPPED BY CONTROL GATE' [patent_app_type] => new [patent_app_number] => 10/616358 [patent_app_country] => US [patent_app_date] => 2003-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8277 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20040105319.pdf [firstpage_image] =>[orig_patent_app_number] => 10616358 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7356956 [patent_doc_number] => 20040004234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Semiconductor device with a disposable gate and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/614368 [patent_app_country] => US [patent_app_date] => 2003-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8225 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20040004234.pdf [firstpage_image] =>[orig_patent_app_number] => 10614368 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 785252 [patent_doc_number] => 06989331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'Hard mask removal' [patent_app_type] => utility [patent_app_number] => 10/615558 [patent_app_country] => US [patent_app_date] => 2003-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3057 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/989/06989331.pdf [firstpage_image] =>[orig_patent_app_number] => 10615558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7359888 [patent_doc_number] => 20040014295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Atomic layer deposition of titanium nitride using batch type chamber and method for fabricating capacitor by using the same' [patent_app_type] => new [patent_app_number] => 10/615038 [patent_app_country] => US [patent_app_date] => 2003-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3664 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20040014295.pdf [firstpage_image] =>[orig_patent_app_number] => 10615038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7061200 [patent_doc_number] => 20050003561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Method for production of MRAM elements' [patent_app_type] => utility [patent_app_number] => 10/610823 [patent_app_country] => US [patent_app_date] => 2003-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1796 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20050003561.pdf [firstpage_image] =>[orig_patent_app_number] => 10610823 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7433481 [patent_doc_number] => 20040002193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-01 [patent_title] => 'Multiple logical bits per memory cell in a memory device' [patent_app_type] => new [patent_app_number] => 10/611544 [patent_app_country] => US [patent_app_date] => 2003-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4190 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20040002193.pdf [firstpage_image] =>[orig_patent_app_number] => 10611544 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7343921 [patent_doc_number] => 20040191928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'MRAM architecture and a method and system for fabricating MRAM memories utilizing the architecture' [patent_app_type] => new [patent_app_number] => 10/606557 [patent_app_country] => US [patent_app_date] => 2003-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6932 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20040191928.pdf [firstpage_image] =>[orig_patent_app_number] => 10606557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7429147 [patent_doc_number] => 20040266063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Apparatus and method for manufacturing thermal interface device having aligned carbon nanotubes' [patent_app_type] => new [patent_app_number] => 10/607178 [patent_app_country] => US [patent_app_date] => 2003-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5069 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266063.pdf [firstpage_image] =>[orig_patent_app_number] => 10607178 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7609491 [patent_doc_number] => 06998698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'Memory cell with a perovskite structure varistor' [patent_app_type] => utility [patent_app_number] => 10/606408 [patent_app_country] => US [patent_app_date] => 2003-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 43 [patent_no_of_words] => 13516 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/998/06998698.pdf [firstpage_image] =>[orig_patent_app_number] => 10606408 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 754209 [patent_doc_number] => 07018857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-28 [patent_title] => 'Method of manufacturing a semiconductor device including defect inspection using a semiconductor testing probe' [patent_app_type] => utility [patent_app_number] => 10/459598 [patent_app_country] => US [patent_app_date] => 2003-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 9294 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/018/07018857.pdf [firstpage_image] =>[orig_patent_app_number] => 10459598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7398659 [patent_doc_number] => 20040018650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Substrate processing apparatus' [patent_app_type] => new [patent_app_number] => 10/457518 [patent_app_country] => US [patent_app_date] => 2003-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5952 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20040018650.pdf [firstpage_image] =>[orig_patent_app_number] => 10457518 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 725800 [patent_doc_number] => 07045867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-16 [patent_title] => 'Semiconductor device of reduced gate overlap capacitance and method of manufacturing the semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/456548 [patent_app_country] => US [patent_app_date] => 2003-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 35 [patent_no_of_words] => 8162 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/045/07045867.pdf [firstpage_image] =>[orig_patent_app_number] => 10456548 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 700162 [patent_doc_number] => 07067865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-27 [patent_title] => 'High density chalcogenide memory cells' [patent_app_type] => utility [patent_app_number] => 10/456818 [patent_app_country] => US [patent_app_date] => 2003-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6624 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/067/07067865.pdf [firstpage_image] =>[orig_patent_app_number] => 10456818 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7235715 [patent_doc_number] => 20040157465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Method for manufacturing an electronic device including removing a resist mask used in etching a substrate by ashing' [patent_app_type] => new [patent_app_number] => 10/449128 [patent_app_country] => US [patent_app_date] => 2003-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7042 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20040157465.pdf [firstpage_image] =>[orig_patent_app_number] => 10449128 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7269953 [patent_doc_number] => 20040058471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Fabrication method for ball grid array semiconductor package' [patent_app_type] => new [patent_app_number] => 10/452488 [patent_app_country] => US [patent_app_date] => 2003-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2551 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20040058471.pdf [firstpage_image] =>[orig_patent_app_number] => 10452488 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7275749 [patent_doc_number] => 20040235200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Oxygen content system and method for controlling memory resistance properties' [patent_app_type] => new [patent_app_number] => 10/442628 [patent_app_country] => US [patent_app_date] => 2003-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4481 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20040235200.pdf [firstpage_image] =>[orig_patent_app_number] => 10442628 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 642776 [patent_doc_number] => 07122872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-17 [patent_title] => 'Control of stress in metal films by controlling the atmosphere during film deposition' [patent_app_type] => utility [patent_app_number] => 10/441458 [patent_app_country] => US [patent_app_date] => 2003-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4838 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/122/07122872.pdf [firstpage_image] =>[orig_patent_app_number] => 10441458 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7625532 [patent_doc_number] => 06723637 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-20 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => B2 [patent_app_number] => 10/441128 [patent_app_country] => US [patent_app_date] => 2003-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 8004 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/723/06723637.pdf [firstpage_image] =>[orig_patent_app_number] => 10441128 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6821792 [patent_doc_number] => 20030219953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'Method for fabricating semiconductor devices' [patent_app_type] => new [patent_app_number] => 10/441178 [patent_app_country] => US [patent_app_date] => 2003-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8083 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20030219953.pdf [firstpage_image] =>[orig_patent_app_number] => 10441178 [rel_patent_id] =>[rel_patent_doc_number] =>)