Koosha Sharifi-tafreshi
Examiner (ID: 1458, Phone: (571)270-5897 , Office: P/2623 )
Most Active Art Unit | 2623 |
Art Unit(s) | 2623, 2629, 2695 |
Total Applications | 1151 |
Issued Applications | 889 |
Pending Applications | 55 |
Abandoned Applications | 207 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 5951477
[patent_doc_number] => 20020006703
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-01-17
[patent_title] => 'Field-effect transistor configuration with a trench-shaped gate electrode and an additional highly doped layer in the body region'
[patent_app_type] => new
[patent_app_number] => 09/883808
[patent_app_country] => US
[patent_app_date] => 2001-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6698
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0006/20020006703.pdf
[firstpage_image] =>[orig_patent_app_number] => 09883808
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/883808 | Field-effect transistor configuration with a trench-shaped gate electrode and an additional highly doped layer in the body region | Jun 17, 2001 | Issued |
Array
(
[id] => 6896240
[patent_doc_number] => 20010027030
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-10-04
[patent_title] => 'Method for cleaning a process chamber'
[patent_app_type] => new
[patent_app_number] => 09/874882
[patent_app_country] => US
[patent_app_date] => 2001-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4552
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0027/20010027030.pdf
[firstpage_image] =>[orig_patent_app_number] => 09874882
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/874882 | Computer readable medium for controlling a method of cleaning a process chamber | Jun 4, 2001 | Issued |
Array
(
[id] => 961313
[patent_doc_number] => 06952026
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-10-04
[patent_title] => 'Position sensitive photo detector'
[patent_app_type] => utility
[patent_app_number] => 10/296823
[patent_app_country] => US
[patent_app_date] => 2001-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 2370
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/952/06952026.pdf
[firstpage_image] =>[orig_patent_app_number] => 10296823
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/296823 | Position sensitive photo detector | May 31, 2001 | Issued |
Array
(
[id] => 1453600
[patent_doc_number] => 06461950
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-10-08
[patent_title] => 'Semiconductor processing methods, semiconductor circuitry, and gate stacks'
[patent_app_type] => B2
[patent_app_number] => 09/870850
[patent_app_country] => US
[patent_app_date] => 2001-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2709
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/461/06461950.pdf
[firstpage_image] =>[orig_patent_app_number] => 09870850
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/870850 | Semiconductor processing methods, semiconductor circuitry, and gate stacks | May 29, 2001 | Issued |
Array
(
[id] => 1490042
[patent_doc_number] => 06417015
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-07-09
[patent_title] => 'Semiconductor processing methods and semiconductor defect detection methods'
[patent_app_type] => B2
[patent_app_number] => 09/870157
[patent_app_country] => US
[patent_app_date] => 2001-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 1799
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/417/06417015.pdf
[firstpage_image] =>[orig_patent_app_number] => 09870157
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/870157 | Semiconductor processing methods and semiconductor defect detection methods | May 28, 2001 | Issued |
Array
(
[id] => 1582868
[patent_doc_number] => 06423989
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-23
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => B1
[patent_app_number] => 09/864248
[patent_app_country] => US
[patent_app_date] => 2001-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 17
[patent_no_of_words] => 4924
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/423/06423989.pdf
[firstpage_image] =>[orig_patent_app_number] => 09864248
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/864248 | Semiconductor device and method of manufacturing the same | May 24, 2001 | Issued |
Array
(
[id] => 1421122
[patent_doc_number] => 06521986
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-02-18
[patent_title] => 'Slot apparatus for programmable multi-chip module'
[patent_app_type] => B2
[patent_app_number] => 09/865213
[patent_app_country] => US
[patent_app_date] => 2001-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2686
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/521/06521986.pdf
[firstpage_image] =>[orig_patent_app_number] => 09865213
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/865213 | Slot apparatus for programmable multi-chip module | May 23, 2001 | Issued |
Array
(
[id] => 6897395
[patent_doc_number] => 20010045560
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-29
[patent_title] => 'Display device'
[patent_app_type] => new
[patent_app_number] => 09/864474
[patent_app_country] => US
[patent_app_date] => 2001-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1449
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0045/20010045560.pdf
[firstpage_image] =>[orig_patent_app_number] => 09864474
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/864474 | Display device with color filter covering portion of reflecting part | May 23, 2001 | Issued |
Array
(
[id] => 1576279
[patent_doc_number] => 06469340
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-10-22
[patent_title] => 'Flash memory device with an inverted tapered floating gate'
[patent_app_type] => B2
[patent_app_number] => 09/863705
[patent_app_country] => US
[patent_app_date] => 2001-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 2117
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/469/06469340.pdf
[firstpage_image] =>[orig_patent_app_number] => 09863705
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/863705 | Flash memory device with an inverted tapered floating gate | May 22, 2001 | Issued |
Array
(
[id] => 1360751
[patent_doc_number] => 06576999
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-06-10
[patent_title] => 'Mounting structure for an electronic component having an external terminal electrode'
[patent_app_type] => B2
[patent_app_number] => 09/863130
[patent_app_country] => US
[patent_app_date] => 2001-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 7265
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/576/06576999.pdf
[firstpage_image] =>[orig_patent_app_number] => 09863130
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/863130 | Mounting structure for an electronic component having an external terminal electrode | May 22, 2001 | Issued |
Array
(
[id] => 6427555
[patent_doc_number] => 20020175391
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-28
[patent_title] => 'LOW-VOLTAGE PUNCH-THROUGH BI-DIRECTIONAL TRANSIENT-VOLTAGE SUPPRESSION DEVICES AND METHODS OF MAKING THE SAME'
[patent_app_type] => new
[patent_app_number] => 09/862664
[patent_app_country] => US
[patent_app_date] => 2001-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6699
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0175/20020175391.pdf
[firstpage_image] =>[orig_patent_app_number] => 09862664
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/862664 | Low-voltage punch-through bi-directional transient-voltage suppression devices | May 21, 2001 | Issued |
Array
(
[id] => 6947926
[patent_doc_number] => 20010021560
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-09-13
[patent_title] => 'Redundancy structure in self-aligned contact process'
[patent_app_type] => new
[patent_app_number] => 09/859300
[patent_app_country] => US
[patent_app_date] => 2001-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2695
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 25
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0021/20010021560.pdf
[firstpage_image] =>[orig_patent_app_number] => 09859300
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/859300 | Redundancy structure in self-aligned contacts | May 17, 2001 | Issued |
Array
(
[id] => 6107158
[patent_doc_number] => 20020171110
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-21
[patent_title] => 'Electrostatic discharge protection circuit device and a manufacturing method for the same'
[patent_app_type] => new
[patent_app_number] => 09/860973
[patent_app_country] => US
[patent_app_date] => 2001-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2770
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 314
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0171/20020171110.pdf
[firstpage_image] =>[orig_patent_app_number] => 09860973
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/860973 | Electrostatic discharge protection circuit device | May 17, 2001 | Issued |
Array
(
[id] => 1424090
[patent_doc_number] => 06507057
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-01-14
[patent_title] => 'Cross under metal wiring structure for self-scanning light-emitting device'
[patent_app_type] => B1
[patent_app_number] => 09/856083
[patent_app_country] => US
[patent_app_date] => 2001-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 3331
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/507/06507057.pdf
[firstpage_image] =>[orig_patent_app_number] => 09856083
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/856083 | Cross under metal wiring structure for self-scanning light-emitting device | May 16, 2001 | Issued |
Array
(
[id] => 5813016
[patent_doc_number] => 20020038888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-04
[patent_title] => 'Semiconductor integrated circuit together with timepiece and electronic equipment provided with the same'
[patent_app_type] => new
[patent_app_number] => 09/855693
[patent_app_country] => US
[patent_app_date] => 2001-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8371
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 17
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0038/20020038888.pdf
[firstpage_image] =>[orig_patent_app_number] => 09855693
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/855693 | Operating circuit with voltage regular circuit having at least a partially depleted soi field effect transistor | May 15, 2001 | Issued |
Array
(
[id] => 6044436
[patent_doc_number] => 20020167089
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-14
[patent_title] => 'Copper dual damascene interconnect technology'
[patent_app_type] => new
[patent_app_number] => 09/854540
[patent_app_country] => US
[patent_app_date] => 2001-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4944
[patent_no_of_claims] => 69
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0167/20020167089.pdf
[firstpage_image] =>[orig_patent_app_number] => 09854540
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/854540 | Copper dual damascene interconnect technology | May 13, 2001 | Abandoned |
Array
(
[id] => 7623516
[patent_doc_number] => 06686649
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-02-03
[patent_title] => 'Multi-chip semiconductor package with integral shield and antenna'
[patent_app_type] => B1
[patent_app_number] => 09/855244
[patent_app_country] => US
[patent_app_date] => 2001-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 9172
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 6
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/686/06686649.pdf
[firstpage_image] =>[orig_patent_app_number] => 09855244
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/855244 | Multi-chip semiconductor package with integral shield and antenna | May 13, 2001 | Issued |
Array
(
[id] => 1291314
[patent_doc_number] => 06633068
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-10-14
[patent_title] => 'Low-noise silicon controlled rectifier for electrostatic discharge protection'
[patent_app_type] => B2
[patent_app_number] => 09/852234
[patent_app_country] => US
[patent_app_date] => 2001-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 5141
[patent_no_of_claims] => 46
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/633/06633068.pdf
[firstpage_image] =>[orig_patent_app_number] => 09852234
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/852234 | Low-noise silicon controlled rectifier for electrostatic discharge protection | May 9, 2001 | Issued |
Array
(
[id] => 6459763
[patent_doc_number] => 20020020928
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-02-21
[patent_title] => 'Ball grid array package for providing constant internal voltage via a PCB substrate routing configuration'
[patent_app_type] => new
[patent_app_number] => 09/851093
[patent_app_country] => US
[patent_app_date] => 2001-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2505
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0020/20020020928.pdf
[firstpage_image] =>[orig_patent_app_number] => 09851093
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/851093 | Ball grid array package for providing constant internal voltage via a PCB substrate routing configuration | May 8, 2001 | Issued |
Array
(
[id] => 1314459
[patent_doc_number] => 06614102
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-09-02
[patent_title] => 'Shielded semiconductor leadframe package'
[patent_app_type] => B1
[patent_app_number] => 09/848864
[patent_app_country] => US
[patent_app_date] => 2001-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 2715
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/614/06614102.pdf
[firstpage_image] =>[orig_patent_app_number] => 09848864
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/848864 | Shielded semiconductor leadframe package | May 3, 2001 | Issued |