Koosha Sharifi-tafreshi

Array ( [id] => 4325212 [patent_doc_number] => 06329278 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Multiple row wire bonding with ball bonds of outer bond pads bonded on the leads' [patent_app_type] => 1 [patent_app_number] => 9/476958 [patent_app_country] => US [patent_app_date] => 2000-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4435 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/329/06329278.pdf [firstpage_image] =>[orig_patent_app_number] => 476958 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4246452 [patent_doc_number] => 06221687 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Color image sensor with embedded microlens array' [patent_app_type] => 1 [patent_app_number] => 9/470558 [patent_app_country] => US [patent_app_date] => 1999-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 4170 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/221/06221687.pdf [firstpage_image] =>[orig_patent_app_number] => 470558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4408972 [patent_doc_number] => 06300256 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Method and device for producing electrically conductive continuity in semiconductor components' [patent_app_type] => 1 [patent_app_number] => 9/446408 [patent_app_country] => US [patent_app_date] => 1999-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7484 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/300/06300256.pdf [firstpage_image] =>[orig_patent_app_number] => 446408 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4420403 [patent_doc_number] => 06225197 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Method of forming polycrystalline film by steps including introduction of nickel and rapid thermal anneal' [patent_app_type] => 1 [patent_app_number] => 9/465238 [patent_app_country] => US [patent_app_date] => 1999-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 7034 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225197.pdf [firstpage_image] =>[orig_patent_app_number] => 465238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4246393 [patent_doc_number] => 06221683 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Method for producing a light-emitting component' [patent_app_type] => 1 [patent_app_number] => 9/450398 [patent_app_country] => US [patent_app_date] => 1999-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2691 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/221/06221683.pdf [firstpage_image] =>[orig_patent_app_number] => 450398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4286089 [patent_doc_number] => 06211027 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Method for manufacturing PMOS transistor' [patent_app_type] => 1 [patent_app_number] => 9/444278 [patent_app_country] => US [patent_app_date] => 1999-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2334 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/211/06211027.pdf [firstpage_image] =>[orig_patent_app_number] => 444278 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4286243 [patent_doc_number] => 06211036 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Semiconductor device having an improved capacitor structure, and a method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/440698 [patent_app_country] => US [patent_app_date] => 1999-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 4882 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/211/06211036.pdf [firstpage_image] =>[orig_patent_app_number] => 440698 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4381241 [patent_doc_number] => 06277710 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Method of forming shallow trench isolation' [patent_app_type] => 1 [patent_app_number] => 9/439358 [patent_app_country] => US [patent_app_date] => 1999-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 2367 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/277/06277710.pdf [firstpage_image] =>[orig_patent_app_number] => 439358 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1459234 [patent_doc_number] => 06391679 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Method of processing a single semiconductor using at least one carrier element' [patent_app_type] => B1 [patent_app_number] => 09/434158 [patent_app_country] => US [patent_app_date] => 1999-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 6134 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/391/06391679.pdf [firstpage_image] =>[orig_patent_app_number] => 09434158 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4344327 [patent_doc_number] => 06284622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-04 [patent_title] => 'Method for filling trenches' [patent_app_type] => 1 [patent_app_number] => 9/426208 [patent_app_country] => US [patent_app_date] => 1999-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3280 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/284/06284622.pdf [firstpage_image] =>[orig_patent_app_number] => 426208 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4102183 [patent_doc_number] => 06100179 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Electromigration resistant patterned metal layer gap filled with HSQ' [patent_app_type] => 1 [patent_app_number] => 9/415218 [patent_app_country] => US [patent_app_date] => 1999-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2758 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100179.pdf [firstpage_image] =>[orig_patent_app_number] => 415218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4293158 [patent_doc_number] => 06180542 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Method for forming a high-permittivity dielectric film use in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/418188 [patent_app_country] => US [patent_app_date] => 1999-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1893 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/180/06180542.pdf [firstpage_image] =>[orig_patent_app_number] => 418188 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4257526 [patent_doc_number] => 06204072 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Circuit and a method for configuring pad connections in an integrated device' [patent_app_type] => 1 [patent_app_number] => 9/417029 [patent_app_country] => US [patent_app_date] => 1999-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3177 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204072.pdf [firstpage_image] =>[orig_patent_app_number] => 417029 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4343361 [patent_doc_number] => 06284561 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-04 [patent_title] => 'Method of forming a metal plate of a fingerprint sensor chip on a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 9/414898 [patent_app_country] => US [patent_app_date] => 1999-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2899 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/284/06284561.pdf [firstpage_image] =>[orig_patent_app_number] => 414898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4419444 [patent_doc_number] => 06177313 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Method for forming a muti-level ROM memory in a dual gate CMOS process, and corresponding ROM memory cell' [patent_app_type] => 1 [patent_app_number] => 9/411138 [patent_app_country] => US [patent_app_date] => 1999-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2073 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177313.pdf [firstpage_image] =>[orig_patent_app_number] => 411138 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4094209 [patent_doc_number] => 06096580 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Low programming voltage anti-fuse' [patent_app_type] => 1 [patent_app_number] => 9/405331 [patent_app_country] => US [patent_app_date] => 1999-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 4166 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096580.pdf [firstpage_image] =>[orig_patent_app_number] => 405331 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4408297 [patent_doc_number] => 06300198 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Method for producing a vertical MOS-transistor' [patent_app_type] => 1 [patent_app_number] => 9/381218 [patent_app_country] => US [patent_app_date] => 1999-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 5805 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/300/06300198.pdf [firstpage_image] =>[orig_patent_app_number] => 381218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4350527 [patent_doc_number] => 06291312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Method for forming pullback opening above shallow trenc isolation structure' [patent_app_type] => 1 [patent_app_number] => 9/395108 [patent_app_country] => US [patent_app_date] => 1999-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2730 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/291/06291312.pdf [firstpage_image] =>[orig_patent_app_number] => 395108 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4181763 [patent_doc_number] => 06150189 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Method for forming a photo diode and a CMOS transistor simultaneously' [patent_app_type] => 1 [patent_app_number] => 9/391358 [patent_app_country] => US [patent_app_date] => 1999-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2374 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150189.pdf [firstpage_image] =>[orig_patent_app_number] => 391358 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4417338 [patent_doc_number] => 06194292 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Method of fabricating in-situ doped rough polycrystalline silicon using a single wafer reactor' [patent_app_type] => 1 [patent_app_number] => 9/378688 [patent_app_country] => US [patent_app_date] => 1999-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2294 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194292.pdf [firstpage_image] =>[orig_patent_app_number] => 378688 [rel_patent_id] =>[rel_patent_doc_number] =>)