Search

Kretelia Graham

Examiner (ID: 11675, Phone: (571)272-5055 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2817, 2827, 2615, 2825
Total Applications
682
Issued Applications
562
Pending Applications
12
Abandoned Applications
115

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9190177 [patent_doc_number] => 20130329492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'FLASH MEMORY CONTROL METHOD, CONTROLLER AND ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/911096 [patent_app_country] => US [patent_app_date] => 2013-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6800 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13911096 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/911096
Flash memory control method, controller and electronic apparatus Jun 5, 2013 Issued
Array ( [id] => 9595919 [patent_doc_number] => 20140192597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'CIRCUIT FOR CONTROLLING EEPROM CELL' [patent_app_type] => utility [patent_app_number] => 13/911310 [patent_app_country] => US [patent_app_date] => 2013-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7395 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13911310 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/911310
CIRCUIT FOR CONTROLLING EEPROM CELL Jun 5, 2013 Abandoned
Array ( [id] => 9092764 [patent_doc_number] => 20130272075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'MEMORY ADDRESS REPAIR WITHOUT ENABLE FUSES' [patent_app_type] => utility [patent_app_number] => 13/911863 [patent_app_country] => US [patent_app_date] => 2013-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8616 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13911863 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/911863
Memory address repair without enable fuses Jun 5, 2013 Issued
Array ( [id] => 10959615 [patent_doc_number] => 20140362642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-11 [patent_title] => '3D Non-Volatile Memory With Control Gate Length Based On Memory Hole Diameter' [patent_app_type] => utility [patent_app_number] => 13/910388 [patent_app_country] => US [patent_app_date] => 2013-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 14721 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13910388 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/910388
3D Non-Volatile Memory With Control Gate Length Based On Memory Hole Diameter Jun 4, 2013 Abandoned
Array ( [id] => 9544466 [patent_doc_number] => 20140169113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'Enhancing Memory Yield Through Memory Subsystem Repair' [patent_app_type] => utility [patent_app_number] => 13/910582 [patent_app_country] => US [patent_app_date] => 2013-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2984 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13910582 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/910582
Enhancing Memory Yield Through Memory Subsystem Repair Jun 4, 2013 Abandoned
Array ( [id] => 9884358 [patent_doc_number] => 08971135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Semiconductor memory device receiving data in response to data strobe signal, memory system including the same and operating method thereof' [patent_app_type] => utility [patent_app_number] => 13/910502 [patent_app_country] => US [patent_app_date] => 2013-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 7606 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13910502 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/910502
Semiconductor memory device receiving data in response to data strobe signal, memory system including the same and operating method thereof Jun 4, 2013 Issued
Array ( [id] => 10959630 [patent_doc_number] => 20140362657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-11 [patent_title] => 'FLEXIBLE IDENTIFICATION TECHNIQUE' [patent_app_type] => utility [patent_app_number] => 13/910632 [patent_app_country] => US [patent_app_date] => 2013-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3039 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13910632 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/910632
Flexible identification technique Jun 4, 2013 Issued
Array ( [id] => 10952345 [patent_doc_number] => 20140355365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'PULSE GENERATOR' [patent_app_type] => utility [patent_app_number] => 13/910078 [patent_app_country] => US [patent_app_date] => 2013-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5119 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13910078 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/910078
PULSE GENERATOR Jun 3, 2013 Abandoned
Array ( [id] => 10178622 [patent_doc_number] => 09208833 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Sequential memory operation without deactivating access line signals' [patent_app_type] => utility [patent_app_number] => 13/868548 [patent_app_country] => US [patent_app_date] => 2013-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11405 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13868548 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/868548
Sequential memory operation without deactivating access line signals Apr 22, 2013 Issued
Array ( [id] => 10564177 [patent_doc_number] => 09287859 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-15 [patent_title] => 'Flexible input/output transceiver' [patent_app_type] => utility [patent_app_number] => 13/866712 [patent_app_country] => US [patent_app_date] => 2013-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4352 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13866712 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/866712
Flexible input/output transceiver Apr 18, 2013 Issued
Array ( [id] => 10839608 [patent_doc_number] => 08867293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-21 [patent_title] => 'Semiconductor memory device changing refresh interval depending on temperature' [patent_app_type] => utility [patent_app_number] => 13/848514 [patent_app_country] => US [patent_app_date] => 2013-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5872 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13848514 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/848514
Semiconductor memory device changing refresh interval depending on temperature Mar 20, 2013 Issued
Array ( [id] => 9945893 [patent_doc_number] => 08995209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'Semiconductor integrated circuit and method for monitoring reference voltage thereof' [patent_app_type] => utility [patent_app_number] => 13/845909 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2230 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13845909 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/845909
Semiconductor integrated circuit and method for monitoring reference voltage thereof Mar 17, 2013 Issued
Array ( [id] => 9559652 [patent_doc_number] => 20140177364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'ONE-TIME PROGRAMMABLE MEMORY AND TEST METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/844937 [patent_app_country] => US [patent_app_date] => 2013-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4109 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13844937 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/844937
ONE-TIME PROGRAMMABLE MEMORY AND TEST METHOD THEREOF Mar 15, 2013 Abandoned
Array ( [id] => 9173019 [patent_doc_number] => 20130315004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'SEMICONDUCTOR DEVICE, A METHOD FOR MANUFACTURING THE SAME, AND A SYSTEM HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/833740 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5419 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13833740 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/833740
Semiconductor device including option pads for determining an operating structure thereof, and a system having the same Mar 14, 2013 Issued
Array ( [id] => 9066990 [patent_doc_number] => 20130258746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/803137 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 20776 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13803137 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/803137
Semiconductor memory device including a memory cell comprising a D/A converter Mar 13, 2013 Issued
Array ( [id] => 11227321 [patent_doc_number] => 09455047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-27 [patent_title] => 'Memory device to correct defect cell generated after packaging' [patent_app_type] => utility [patent_app_number] => 13/799967 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 11061 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13799967 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/799967
Memory device to correct defect cell generated after packaging Mar 12, 2013 Issued
Array ( [id] => 8926762 [patent_doc_number] => 20130182523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-18 [patent_title] => 'ROBUST SRAM MEMORY CELL CAPACITOR PLATE VOLTAGE GENERATOR' [patent_app_type] => utility [patent_app_number] => 13/791827 [patent_app_country] => US [patent_app_date] => 2013-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5237 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13791827 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/791827
Robust SRAM memory cell capacitor plate voltage generator Mar 7, 2013 Issued
Array ( [id] => 10493014 [patent_doc_number] => 20150378036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'EARTHQUAKE PREDICTION DEVICE' [patent_app_type] => utility [patent_app_number] => 14/770430 [patent_app_country] => US [patent_app_date] => 2013-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6966 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14770430 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/770430
Earthquake prediction device Feb 24, 2013 Issued
Array ( [id] => 10475064 [patent_doc_number] => 20150360080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-17 [patent_title] => 'DETERMINING A SPEED OF A MULTIDIMENSIONAL MOTION IN A GLOBAL COORDINATE SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/760419 [patent_app_country] => US [patent_app_date] => 2013-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11730 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14760419 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/760419
Determining a speed of a multidimensional motion in a global coordinate system Jan 17, 2013 Issued
Array ( [id] => 9292943 [patent_doc_number] => 20140036578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'SRAM READ PREFERRED BIT CELL WITH WRITE ASSIST CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/741869 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6560 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741869 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741869
SRAM read preferred bit cell with write assist circuit Jan 14, 2013 Issued
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