
Kretelia Graham
Examiner (ID: 11675, Phone: (571)272-5055 , Office: P/2825 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2817, 2827, 2615, 2825 |
| Total Applications | 682 |
| Issued Applications | 562 |
| Pending Applications | 12 |
| Abandoned Applications | 115 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8798339
[patent_doc_number] => 08437217
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-05-07
[patent_title] => 'Storing operational information in an array of memory cells'
[patent_app_type] => utility
[patent_app_number] => 13/012020
[patent_app_country] => US
[patent_app_date] => 2011-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 8183
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13012020
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/012020 | Storing operational information in an array of memory cells | Jan 23, 2011 | Issued |
Array
(
[id] => 7485044
[patent_doc_number] => 20110235393
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-29
[patent_title] => 'Nonvolatile storage device'
[patent_app_type] => utility
[patent_app_number] => 12/929360
[patent_app_country] => US
[patent_app_date] => 2011-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 11983
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20110235393.pdf
[firstpage_image] =>[orig_patent_app_number] => 12929360
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/929360 | Nonvolatile storage device having a plurality of plate electrodes | Jan 18, 2011 | Issued |
Array
(
[id] => 6053806
[patent_doc_number] => 20110110166
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-12
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/008423
[patent_app_country] => US
[patent_app_date] => 2011-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 20870
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0110/20110110166.pdf
[firstpage_image] =>[orig_patent_app_number] => 13008423
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/008423 | SEMICONDUCTOR DEVICE | Jan 17, 2011 | Abandoned |
Array
(
[id] => 6044859
[patent_doc_number] => 20110205826
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-25
[patent_title] => 'Storage control device, storage device and storage device system'
[patent_app_type] => utility
[patent_app_number] => 12/929272
[patent_app_country] => US
[patent_app_date] => 2011-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 15947
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0205/20110205826.pdf
[firstpage_image] =>[orig_patent_app_number] => 12929272
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/929272 | Storage control device controlling refresh frequency based on temperature | Jan 11, 2011 | Issued |
Array
(
[id] => 9356874
[patent_doc_number] => 08675419
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-18
[patent_title] => 'Device including a plurality of memory banks and a pipeline control circuit configured to execute a command on the plurality of memory banks'
[patent_app_type] => utility
[patent_app_number] => 12/929126
[patent_app_country] => US
[patent_app_date] => 2011-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 32
[patent_no_of_words] => 24584
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 513
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12929126
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/929126 | Device including a plurality of memory banks and a pipeline control circuit configured to execute a command on the plurality of memory banks | Jan 2, 2011 | Issued |
Array
(
[id] => 8276537
[patent_doc_number] => 20120170390
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'Read stability of a semiconductor memory'
[patent_app_type] => utility
[patent_app_number] => 12/929138
[patent_app_country] => US
[patent_app_date] => 2011-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7369
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12929138
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/929138 | Improving read stability of a semiconductor memory | Jan 2, 2011 | Issued |
Array
(
[id] => 7806442
[patent_doc_number] => 20120057395
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-08
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/983112
[patent_app_country] => US
[patent_app_date] => 2010-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2055
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0057/20120057395.pdf
[firstpage_image] =>[orig_patent_app_number] => 12983112
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983112 | SEMICONDUCTOR INTEGRATED CIRCUIT | Dec 30, 2010 | Abandoned |
Array
(
[id] => 7578854
[patent_doc_number] => 20110292737
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-01
[patent_title] => 'NONVOLATILE MEMORY APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 12/983068
[patent_app_country] => US
[patent_app_date] => 2010-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3098
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0292/20110292737.pdf
[firstpage_image] =>[orig_patent_app_number] => 12983068
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983068 | NONVOLATILE MEMORY APPARATUS | Dec 30, 2010 | Abandoned |
Array
(
[id] => 8922464
[patent_doc_number] => 08488407
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-16
[patent_title] => 'Nonvolatile memory apparatus and method for processing configuration information thereof'
[patent_app_type] => utility
[patent_app_number] => 12/983124
[patent_app_country] => US
[patent_app_date] => 2010-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3922
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983124
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983124 | Nonvolatile memory apparatus and method for processing configuration information thereof | Dec 30, 2010 | Issued |
Array
(
[id] => 9200319
[patent_doc_number] => 20130339634
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-12-19
[patent_title] => 'CONTINUOUS PAGE READ FOR MEMORY'
[patent_app_type] => utility
[patent_app_number] => 13/202326
[patent_app_country] => US
[patent_app_date] => 2010-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7335
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13202326
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/202326 | Continuous page read for memory | Dec 23, 2010 | Issued |
Array
(
[id] => 8219428
[patent_doc_number] => 20120134200
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-31
[patent_title] => 'Magnetic Memory Cell With Multi-Level Cell (MLC) Data Storage Capability'
[patent_app_type] => utility
[patent_app_number] => 12/955612
[patent_app_country] => US
[patent_app_date] => 2010-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3988
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12955612
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/955612 | Magnetic Memory Cell With Multi-Level Cell (MLC) Data Storage Capability | Nov 28, 2010 | Abandoned |
Array
(
[id] => 8019797
[patent_doc_number] => 08139407
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-03-20
[patent_title] => 'Nonvolatile semiconductor memory device including NAND-type flash memory and the like'
[patent_app_type] => utility
[patent_app_number] => 12/955621
[patent_app_country] => US
[patent_app_date] => 2010-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 23
[patent_no_of_words] => 7919
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/139/08139407.pdf
[firstpage_image] =>[orig_patent_app_number] => 12955621
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/955621 | Nonvolatile semiconductor memory device including NAND-type flash memory and the like | Nov 28, 2010 | Issued |
Array
(
[id] => 5974534
[patent_doc_number] => 20110069568
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-24
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING LOCAL SENSE AMPLIFIER WITH ON/OFF CONTROL'
[patent_app_type] => utility
[patent_app_number] => 12/952328
[patent_app_country] => US
[patent_app_date] => 2010-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6645
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0069/20110069568.pdf
[firstpage_image] =>[orig_patent_app_number] => 12952328
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/952328 | SEMICONDUCTOR MEMORY DEVICE HAVING LOCAL SENSE AMPLIFIER WITH ON/OFF CONTROL | Nov 22, 2010 | Abandoned |
Array
(
[id] => 8207680
[patent_doc_number] => 20120127794
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-24
[patent_title] => 'PROGRAM VERIFY OPERATION IN A MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/949876
[patent_app_country] => US
[patent_app_date] => 2010-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2840
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0127/20120127794.pdf
[firstpage_image] =>[orig_patent_app_number] => 12949876
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/949876 | Program verify operation in a memory device | Nov 18, 2010 | Issued |
Array
(
[id] => 9705653
[patent_doc_number] => 08830734
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-09
[patent_title] => 'Using a nearby cell to provide field assisted switching in a magnetic memory array'
[patent_app_type] => utility
[patent_app_number] => 12/950673
[patent_app_country] => US
[patent_app_date] => 2010-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4363
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12950673
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/950673 | Using a nearby cell to provide field assisted switching in a magnetic memory array | Nov 18, 2010 | Issued |
Array
(
[id] => 6189360
[patent_doc_number] => 20110126039
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-26
[patent_title] => 'MEMORY CONTROLLER WITH REDUCED POWER CONSUMPTION, MEMORY DEVICE, AND MEMORY SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 12/950028
[patent_app_country] => US
[patent_app_date] => 2010-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7580
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0126/20110126039.pdf
[firstpage_image] =>[orig_patent_app_number] => 12950028
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/950028 | Memory controller with reduced power consumption, memory device, and memory system | Nov 18, 2010 | Issued |
Array
(
[id] => 6006019
[patent_doc_number] => 20110058405
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-10
[patent_title] => 'Memory Cell With Proportional Current Self-Reference Sensing'
[patent_app_type] => utility
[patent_app_number] => 12/946582
[patent_app_country] => US
[patent_app_date] => 2010-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6043
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0058/20110058405.pdf
[firstpage_image] =>[orig_patent_app_number] => 12946582
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/946582 | Memory cell with proportional current self-reference sensing | Nov 14, 2010 | Issued |
Array
(
[id] => 7546701
[patent_doc_number] => 08054678
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-08
[patent_title] => 'Stuck-at defect condition repair for a non-volatile memory cell'
[patent_app_type] => utility
[patent_app_number] => 12/900303
[patent_app_country] => US
[patent_app_date] => 2010-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 3707
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/054/08054678.pdf
[firstpage_image] =>[orig_patent_app_number] => 12900303
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/900303 | Stuck-at defect condition repair for a non-volatile memory cell | Oct 6, 2010 | Issued |
Array
(
[id] => 10846113
[patent_doc_number] => 08873303
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-28
[patent_title] => 'Non-volatile memory and method with shared processing for an aggregate of read/write circuits'
[patent_app_type] => utility
[patent_app_number] => 12/900443
[patent_app_country] => US
[patent_app_date] => 2010-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 26
[patent_no_of_words] => 9274
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12900443
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/900443 | Non-volatile memory and method with shared processing for an aggregate of read/write circuits | Oct 6, 2010 | Issued |
Array
(
[id] => 6588474
[patent_doc_number] => 20100322015
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-23
[patent_title] => 'Split Gate NAND Flash Memory Structure and Array, Method of Programming, Erasing and Reading Thereof, and Method of Manufacturing'
[patent_app_type] => utility
[patent_app_number] => 12/872351
[patent_app_country] => US
[patent_app_date] => 2010-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6290
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0322/20100322015.pdf
[firstpage_image] =>[orig_patent_app_number] => 12872351
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/872351 | Split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing | Aug 30, 2010 | Issued |