Search

Kretelia Graham

Examiner (ID: 7064)

Most Active Art Unit
2827
Art Unit(s)
2825, 2615, 2817, 2827
Total Applications
682
Issued Applications
565
Pending Applications
4
Abandoned Applications
116

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5951060 [patent_doc_number] => 20110032742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'One-time programmable memory cell with shiftable threshold voltage transistor' [patent_app_type] => utility [patent_app_number] => 12/462732 [patent_app_country] => US [patent_app_date] => 2009-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4072 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20110032742.pdf [firstpage_image] =>[orig_patent_app_number] => 12462732 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/462732
One-time programmable memory cell with shiftable threshold voltage transistor Aug 6, 2009 Issued
Array ( [id] => 6194569 [patent_doc_number] => 20110026323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-03 [patent_title] => 'Gated Diode Memory Cells' [patent_app_type] => utility [patent_app_number] => 12/512582 [patent_app_country] => US [patent_app_date] => 2009-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11605 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20110026323.pdf [firstpage_image] =>[orig_patent_app_number] => 12512582 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/512582
Gated Diode Memory Cells Jul 29, 2009 Abandoned
Array ( [id] => 8307206 [patent_doc_number] => 08228753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'System and method of maintaining data integrity in a flash storage device' [patent_app_type] => utility [patent_app_number] => 12/511990 [patent_app_country] => US [patent_app_date] => 2009-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5574 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12511990 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/511990
System and method of maintaining data integrity in a flash storage device Jul 28, 2009 Issued
Array ( [id] => 9664061 [patent_doc_number] => 08811058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-19 [patent_title] => 'Resistance change element, method for manufacturing the same, and semiconductor memory' [patent_app_type] => utility [patent_app_number] => 12/511722 [patent_app_country] => US [patent_app_date] => 2009-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 10038 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12511722 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/511722
Resistance change element, method for manufacturing the same, and semiconductor memory Jul 28, 2009 Issued
Array ( [id] => 6249637 [patent_doc_number] => 20100027308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/510798 [patent_app_country] => US [patent_app_date] => 2009-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12025 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20100027308.pdf [firstpage_image] =>[orig_patent_app_number] => 12510798 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/510798
Resistance change semiconductor storage device Jul 27, 2009 Issued
Array ( [id] => 5991792 [patent_doc_number] => 20110013445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'Bias Temperature Instability-Influenced Storage Cell' [patent_app_type] => utility [patent_app_number] => 12/505102 [patent_app_country] => US [patent_app_date] => 2009-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1945 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20110013445.pdf [firstpage_image] =>[orig_patent_app_number] => 12505102 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/505102
Bias temperature instability-influenced storage cell Jul 16, 2009 Issued
Array ( [id] => 8910904 [patent_doc_number] => 08482976 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-09 [patent_title] => 'Semiconductor memory device and semiconductor memory system storing multilevel data' [patent_app_type] => utility [patent_app_number] => 12/504966 [patent_app_country] => US [patent_app_date] => 2009-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 49 [patent_no_of_words] => 18162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12504966 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/504966
Semiconductor memory device and semiconductor memory system storing multilevel data Jul 16, 2009 Issued
Array ( [id] => 6517617 [patent_doc_number] => 20100014342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-21 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/505180 [patent_app_country] => US [patent_app_date] => 2009-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8095 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20100014342.pdf [firstpage_image] =>[orig_patent_app_number] => 12505180 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/505180
SEMICONDUCTOR STORAGE DEVICE Jul 16, 2009 Abandoned
Array ( [id] => 5991807 [patent_doc_number] => 20110013460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'DYNAMICALLY ADJUSTABLE ERASE AND PROGRAM LEVELS FOR NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/504576 [patent_app_country] => US [patent_app_date] => 2009-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9760 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20110013460.pdf [firstpage_image] =>[orig_patent_app_number] => 12504576 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/504576
Dynamically adjustable erase and program levels for non-volatile memory Jul 15, 2009 Issued
Array ( [id] => 8330103 [patent_doc_number] => 08238173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Using storage cells to perform computation' [patent_app_type] => utility [patent_app_number] => 12/503916 [patent_app_country] => US [patent_app_date] => 2009-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5998 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12503916 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/503916
Using storage cells to perform computation Jul 15, 2009 Issued
Array ( [id] => 6337480 [patent_doc_number] => 20100329010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'READ OPERATION FOR MEMORY WITH COMPENSATION FOR COUPLING BASED ON WRITE-ERASE CYCLES' [patent_app_type] => utility [patent_app_number] => 12/490550 [patent_app_country] => US [patent_app_date] => 2009-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15917 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0329/20100329010.pdf [firstpage_image] =>[orig_patent_app_number] => 12490550 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/490550
Read operation for memory with compensation for coupling based on write-erase cycles Jun 23, 2009 Issued
Array ( [id] => 9484800 [patent_doc_number] => 08730758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Adjustment of write timing in a memory device' [patent_app_type] => utility [patent_app_number] => 12/490454 [patent_app_country] => US [patent_app_date] => 2009-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7125 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12490454 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/490454
Adjustment of write timing in a memory device Jun 23, 2009 Issued
Array ( [id] => 9531348 [patent_doc_number] => 08755229 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-06-17 [patent_title] => 'Limiting flash memory over programming' [patent_app_type] => utility [patent_app_number] => 12/490002 [patent_app_country] => US [patent_app_date] => 2009-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6919 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12490002 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/490002
Limiting flash memory over programming Jun 22, 2009 Issued
Array ( [id] => 6249733 [patent_doc_number] => 20100027352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/489870 [patent_app_country] => US [patent_app_date] => 2009-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5381 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20100027352.pdf [firstpage_image] =>[orig_patent_app_number] => 12489870 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/489870
Non-volatile semiconductor memory device Jun 22, 2009 Issued
Array ( [id] => 4615334 [patent_doc_number] => 07990781 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-08-02 [patent_title] => 'Write strobe generation for a memory interface controller' [patent_app_type] => utility [patent_app_number] => 12/489770 [patent_app_country] => US [patent_app_date] => 2009-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4608 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/990/07990781.pdf [firstpage_image] =>[orig_patent_app_number] => 12489770 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/489770
Write strobe generation for a memory interface controller Jun 22, 2009 Issued
Array ( [id] => 4492467 [patent_doc_number] => 07885132 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-08 [patent_title] => 'Semiconductor memory device enhancing reliability in data reading' [patent_app_type] => utility [patent_app_number] => 12/437021 [patent_app_country] => US [patent_app_date] => 2009-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 33 [patent_no_of_words] => 20486 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/885/07885132.pdf [firstpage_image] =>[orig_patent_app_number] => 12437021 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/437021
Semiconductor memory device enhancing reliability in data reading May 6, 2009 Issued
Array ( [id] => 5390357 [patent_doc_number] => 20090207670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'DATA OUTPUT BUFFER WHOSE MODE SWITCHES ACCORDING TO OPERATION FREQUENCY AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/427817 [patent_app_country] => US [patent_app_date] => 2009-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3074 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20090207670.pdf [firstpage_image] =>[orig_patent_app_number] => 12427817 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/427817
Data output buffer whose mode switches according to operation frequency and semiconductor memory device having the same Apr 21, 2009 Issued
Array ( [id] => 4540830 [patent_doc_number] => 07872894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-18 [patent_title] => 'SRAM memory cell protected against current or voltage spikes' [patent_app_type] => utility [patent_app_number] => 12/421821 [patent_app_country] => US [patent_app_date] => 2009-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/872/07872894.pdf [firstpage_image] =>[orig_patent_app_number] => 12421821 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/421821
SRAM memory cell protected against current or voltage spikes Apr 9, 2009 Issued
Array ( [id] => 5354087 [patent_doc_number] => 20090185431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-23 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/410868 [patent_app_country] => US [patent_app_date] => 2009-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 20867 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20090185431.pdf [firstpage_image] =>[orig_patent_app_number] => 12410868 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/410868
Semiconductor device Mar 24, 2009 Issued
Array ( [id] => 4537581 [patent_doc_number] => 07924611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Page buffer circuit with reduced size and methods for reading and programming data with the same' [patent_app_type] => utility [patent_app_number] => 12/409405 [patent_app_country] => US [patent_app_date] => 2009-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 16339 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 367 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/924/07924611.pdf [firstpage_image] =>[orig_patent_app_number] => 12409405 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/409405
Page buffer circuit with reduced size and methods for reading and programming data with the same Mar 22, 2009 Issued
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